1. IDR@IIT Indore

Browsing by Author Vishvakarma, Santosh Kumar

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing results 31 to 50 of 204 < previous   next >
Issue DateTitleAuthor(s)
2026C-SIMD: CORDIC-Driven SIMD Processing Element for Resource-Efficient Multi-Precision Deep Learning InferenceTrivedi, Vasundhara; Vishvakarma, Santosh Kumar
2016Characterization of BE-SONOS flash memory using rare-earth materials in tunnel barrier with improved memory dynamicsVishvakarma, Santosh Kumar
2025CIM-Enabled MBRO PUF: Integrating Multistage BRO and Reconfigurable SRAM for Edge Security ApplicationsMaheshwari, Neha; Vishvakarma, Santosh Kumar
2021Classification of targets using statistical features from range fft of mmwave fmcw radarsVishvakarma, Santosh Kumar
2023Clock Gating-Based Effectual Realization of Stochastic Hyperbolic Tangent Function for Deep Neural Hardware AcceleratorsRajput, Gunjan; Logashree, V.; Biyani, Kunika Naresh; Vishvakarma, Santosh Kumar
2023Common Source Amplifier and Ring Oscillator Circuit Performance Optimization Using Multi-Bridge Channel FETsVishvakarma, Santosh Kumar
2018A Compact Electrical Modelling for Top-Gated Doped Graphene Field-Effect TransistorChauhan, Nitesh; Vishvakarma, Santosh Kumar
2019Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power ApplicationsRaut, Gopal; Rajput, Gunjan; Vishwakarma, Abhinav; Shah, Ambika Prasad; Vishvakarma, Santosh Kumar
2012Compact unified modeling of multigate MOSFETs based on isomorphic modeling functionsVishvakarma, Santosh Kumar
2024-05-24Compute in memory architecture using SRAM for edge AIVishvakarma, Santosh Kumar; Patel, Sagar
2024A Configurable Activation Function for Variable Bit-Precision DNN Hardware AcceleratorsRaut, Gopal; Dhakad, Narendra Singh; Vishvakarma, Santosh Kumar
2024Configurable Multi-Port Memory Architecture for High-Speed Data CommunicationDhakad, Narendra Singh; Vishvakarma, Santosh Kumar
2020A CORDIC based configurable activation function for ANN applicationsRaut, Gopal; Rai, Shubham; Vishvakarma, Santosh Kumar; Kumar, Akash
2021D flip-flop based TRNG with zero hardware cost for IoT security applicationsKhan, Sajid; Shah, Ambika Prasad; Vishvakarma, Santosh Kumar
2021Data multiplexed and hardware reused architecture for deep neural network acceleratorRaut, Gopal; Dhakad, Narendra Singh; Gupta, Neha; Vishvakarma, Santosh Kumar
2023-05-26Design & verification of memory protection unit in automotive microcontrollerVishvakarma, Santosh Kumar; Jha, Aastha
2021Design and Analysis of Cyl GAA-TFET-Based Cross-Coupled Voltage Doubler CircuitShah, Ambika Prasad; Raut, Gopal; Vishvakarma, Santosh Kumar
2021Design and Analysis of Ultra-Low Power Memory Architecture with MTCMOS Asymmetrical Ground-Gated 7T SRAM CellVishvakarma, Santosh Kumar
2017Design and investigation of variability aware sense amplifier for low power, high speed SRAMVishvakarma, Santosh Kumar
2022-09-21Design exploration and VLSI implementation of deep neural network accelerator with configurable architectureVishvakarma, Santosh Kumar; Raut, Gopal R.
Showing results 31 to 50 of 204 < previous   next >