Browsing by Author Vishvakarma, Santosh Kumar

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Issue DateTitleAuthor(s)
2021-07-14Performance assessment of scaled charge trap flash memory cell for improved reliabilityVishvakarma, Santosh Kumar; Bohara, Pooja
2019-01-25Performance enhancement of 3D cylindrical gate-all-around tunnel FET and its applications for ultra low power cross coupled voltage doubler circuit designVishvakarma, Santosh Kumar; Beohar, Ankur
2016Performance enhancement of asymmetrical underlap 3D-cylindrical GAA-TFET with low spacer widthVishvakarma, Santosh Kumar
2019-05-01Performance enhancement of CMOS digital circuits strain engineered asymmetric dual-k spacer FinFETsVishvakarma, Santosh Kumar; Gopal, Maisagalla
2021Performance investigations of an improved backstepping operational-space position tracking control of a mobile manipulatorMishra, Swati; Mohan, Santhakumar; Vishvakarma, Santosh Kumar
2013Precise analytical model for short channel Cylindrical Gate (CylG) Gate-All-Around (GAA) MOSFETVishvakarma, Santosh Kumar
2013Precise analytical model for short-channel quadruple-gate gate-all-around MOSFETVishvakarma, Santosh Kumar
2024A Precision-Aware Neuron Engine for DNN AcceleratorsRaut, Gopal; Jaiswal, Sonu; Vishvakarma, Santosh Kumar
2019-07-02Predictive clock skew redistribution methodology for improved timing QoRVishvakarma, Santosh Kumar; Mehetre, Shrikrishna Nana; Sharma, Sanjay
2019-06-28Predictive clock skew redistribution methodology for improving timing QoRVishvakarma, Santosh Kumar; Mehetre, Shrikrishna Nana; Bisht, Pranshu
2019PrefaceSengupta, Anirban; Vishvakarma, Santosh Kumar
2013Process Aware Ultra-High-Speed Hybrid Sensing Technique for Low Power Near-Threshold SRAMVishvakarma, Santosh Kumar
2018Process Variation and NBTI Resilient Schmitt Trigger for Stable and Reliable CircuitsShah, Ambika Prasad; Vishvakarma, Santosh Kumar
2024QuantMAC: Enhancing Hardware Performance in DNNs with Quantize Enabled Multiply-Accumulate UnitAshar, Neha; Raut, Gopal; Trivedi, Vasundhara; Vishvakarma, Santosh Kumar
2023R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devicesDhakad, Narendra Singh; Chittora, Eshika; Vishvakarma, Santosh Kumar
2024ReCAM: Resistive RAM Digital Content Addressable Memory Using Novel 3T1R BitcellSharma, Radheshyam; Dhakad, Narendra Singh; Reddy, Govindu Sathvik; Vishvakarma, Santosh Kumar
2021RECON: Resource-efficient CORDIC-based neuron architectureRaut, Gopal; Vishvakarma, Santosh Kumar
2021A reliable, multi-bit error tolerant 11T SRAM memory design for wireless sensor nodesSharma, Vishal; Gupta, Neha; Shah, Ambika Prasad; Vishvakarma, Santosh Kumar
2024-11-14Resistive RAM based compute-in-memory architecture for content addressable memoryVishvakarma, Santosh Kumar; Sharma, Radheshyam Manojkumar
2025Retrospective: A CORDIC Based Configurable Activation Function for NN ApplicationsKokane, Omkar; Lokhande, Mukul; Vishvakarma, Santosh Kumar