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Browsing by Author Vishvakarma, Santosh Kumar

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Showing results 150 to 169 of 204 < previous   next >
Issue DateTitleAuthor(s)
2024QuantMAC: Enhancing Hardware Performance in DNNs with Quantize Enabled Multiply-Accumulate UnitAshar, Neha; Raut, Gopal; Trivedi, Vasundhara; Vishvakarma, Santosh Kumar
2023R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devicesDhakad, Narendra Singh; Chittora, Eshika; Vishvakarma, Santosh Kumar
2024ReCAM: Resistive RAM Digital Content Addressable Memory Using Novel 3T1R BitcellSharma, Radheshyam; Dhakad, Narendra Singh; Reddy, Govindu Sathvik; Vishvakarma, Santosh Kumar
2021RECON: Resource-efficient CORDIC-based neuron architectureRaut, Gopal; Vishvakarma, Santosh Kumar
2021A reliable, multi-bit error tolerant 11T SRAM memory design for wireless sensor nodesSharma, Vishal; Gupta, Neha; Shah, Ambika Prasad; Vishvakarma, Santosh Kumar
2024-11-14Resistive RAM based compute-in-memory architecture for content addressable memoryVishvakarma, Santosh Kumar; Sharma, Radheshyam Manojkumar
2025Retrospective: A CORDIC Based Configurable Activation Function for NN ApplicationsKokane, Omkar; Lokhande, Mukul; Vishvakarma, Santosh Kumar
2019A Robust Low-Power Write-Assist Data-Dependent-Power-Supplied 12T SRAM CellGupta, Neha; Prasad, Jitesh; Kumar, Rana Sagar; Rajput, Gunjan; Vishvakarma, Santosh Kumar
2018Robust task-space motion control of a mobile manipulator using a nonlinear control with an uncertainty estimatorMishra, Swati; Mohan, Santhakumar; Vishvakarma, Santosh Kumar
2013Robust, ultra fast data sensing technique for low power asymmetrical SRAM with self-shut-off featureVishvakarma, Santosh Kumar
2019A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applicationsSharma, Vishal; Gopal, Maisagalla; Singh, Pooran; Vishvakarma, Santosh Kumar
2013Rtl level implementation of high speed-low power viterbi encoder & decoderSingh, Pooran; Vishvakarma, Santosh Kumar
2022SCAN: Streamlined Composite Activation Function Unit for Deep Neural AcceleratorsRajput, Gunjan; Biyani, Kunika Naresh; Logashree, V.; Vishvakarma, Santosh Kumar
2022SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D ArchitectureRaut, Gopal; Vishvakarma, Santosh Kumar
2025-05-19Secure and reliable in-memory computing for edge AIVishvakarma, Santosh Kumar; Vaish, Shivam
2018Self-Amplified Tunneling-Based SONOS Flash Memory Device with Improved PerformanceBohara, Pooja; Vishvakarma, Santosh Kumar
2021Series diode-connected current mirror based linear and sensitive negative bias temperature instability monitoring circuitShah, Ambika Prasad; Vishvakarma, Santosh Kumar
2020Simplified motion control of a vehicle-manipulator for the coordinated mobile manipulationMishra, Swati; Mohan, Santhakumar; Vishvakarma, Santosh Kumar
2016Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Design in Sub-threshold Regime for Ultra-Low-Power ApplicationsKushwaha, C. B.; Vishvakarma, Santosh Kumar
2014Single-ended sub-threshold FinFET 7T SRAM cell without boosted supplyKushwaha, C. B.; Vishvakarma, Santosh Kumar
Showing results 150 to 169 of 204 < previous   next >