https://dspace.iiti.ac.in:8080/jspui/handle/123456789/9540 Tue, 21 Jul 2026 12:18:24 GMT 2026-07-21T12:18:24Z https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18766 Title: Deep learning and signal processing-based methods for detection of life-threatening cardiac arrhythmias Authors: Phukan, Nabasmita Abstract: Atrial fibrillation (AF), ventricular tachycardia (VT), and ventricular fibrillation (VF) are three of the most prevalent life-threatening arrhythmias and are the major contributors to cardiovascular mortality. Due to the intermittent and paroxysmal nature of the arrhythmias it is highly difficult to detect AF, VT, or VF. Although the clinically sustained AF, VT, and VF requires urgent attention, early detection of these arrhythmias prevent it from reaching this stage. Early detection of the life-threatening arrhythmias are possible through continuous monitoring of electrocardiogram (ECG). As continuous monitoring creates a huge amount of data, it is not possible to manually check for arrhythmias, so there is a need for automated life-threatening arrhythmia detection methods which are reliable and can be implemented on wearables and portable cardiac health monitors. The realtime ECG signals are also highly corrupted by noises which lead to misclassifications. Since low-power devices have low memory capacity and battery constraints, the life threatening detectors must be noise-aware and lightweight with fast processing time, and low energy consumption. In the thesis, we propose lightweight, noise-aware methods for AF, VT/VF detection using signal processing, machine learning, and deep learning approaches. For quality aware AF recognition, we developed four frameworks utilizing the ECG waveform and the characteristics of AF. A novel R-peak detection method is developed to compute RRI interval. An optimized convolutional neural network (CNN) was developed using ECG to detect AF. The second method used R peak detection algorithm to calculate the RR intervals and find a discriminative feature to detect AF using machine learning classifiers. The RR interval, absence of P-wave, and presence of fibrillatory wave characteristics were used with an optimized CNN to develop the third framework. The fourth framework presents a noise-aware, single-stage AF detection method developed using AF, non-AF, and noisy ECG signals as its classes. The quality-aware VT/VF recognition methods include, a simple discriminative feature to detect VT/VF, a signal quality aware VT/VF detection method, and a single-stage noise-aware VT/VF detection method. The thesis also introduces a noise aware AF/VT/VF detector designed to prevent misclassification of AF as VT/VF and avoid unnecessary shocks during cardiac arrest. Thu, 26 Mar 2026 00:00:00 GMT https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18766 2026-03-26T00:00:00Z https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18765 Title: Nonlinear state estimation in chaotic systems with applications [RESTRICTED THESIS-06 Months] Authors: Yamalakonda, Venu Gopal Abstract: [Abstract is restricted for 06 months, due to IPR related issue] Fri, 19 Jun 2026 00:00:00 GMT https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18765 2026-06-19T00:00:00Z https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18758 Title: An exploration of efficient computing techniques for implementing deep neural network accelerators Authors: Trivedi, Vasundhara Abstract: Modern artificial intelligence (AI) applications rely heavily on deep neural networks (DNNs) to perform complex computational tasks. Although DNNs deliver high accuracy, they do so at the cost of substantial power consumption and significant hardware resource utilization, making their edge implementation a major challenge. Edge devices such as Internet of Things (IoT) nodes, mobile platforms, and embedded systems operate under stringent constraints on power, memory, and computational capability. Consequently, deploying DNNs at the edge requires highly efficient computing architectures and optimization techniques that reduce energy consumption and hardware overhead while preserving acceptable levels of inference accuracy and realtime performance. This necessitates optimising DNNs to achieve optimal resource and power consumption while minimising accuracy degradation. Owing to the limited ability of traditional CPUs to efficiently process large volumes of data at high speed, modern DNN workloads increasingly require hardware acceleration. To meet these growing computational demands, a wide range of hardware acceleration platforms have been developed to offload compute-intensive operations from general-purpose CPUs. These platforms—including Field-Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), and Graphics Processing Units (GPUs)—offer higher computational throughput and improved energy efficiency. Consequently, efficient utilization and architectural design of such accelerators are critical for enabling scalable, high-performance DNN processing in complex and data-intensive applications. Mon, 15 Jun 2026 00:00:00 GMT https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18758 2026-06-15T00:00:00Z https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18454 Title: Mathematical analysis of a perceptual quality assessment framework for 3D multimedia [RESTRICTED THESIS-01 Year] Authors: Raghuwanshi, Pankaj Kumar Abstract: [Abstract is restricted for 01 year, due to IPR related issue] Tue, 28 Apr 2026 00:00:00 GMT https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18454 2026-04-28T00:00:00Z