1. IDR@IIT Indore

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Results 11-20 of 219 (Search time: 0.001 seconds).
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Issue DateTitleAuthor(s)
2017Low-cost security aware HLS methodologySengupta, Anirban
2020Security of functionally obfuscated DSP coresSengupta, Anirban; Rathor, Mahendra
2024HLS driven Hybrid GA-PSO for Design Space Exploration of Optimal Palmprint Biometric based IP Watermark and Loop Unrolling FactorSengupta, Anirban; Chourasia, Vishal; Kumar, Nitish Sai
2021Contact-less palmprint biometric for securing DSP coprocessors used in CE systemsSengupta, Anirban; Chaurasia, Rahul; Reddy, Tarun
2023Introduction: Secured co-processors for machine learning and DSP applications using biometricsSengupta, Anirban; Chaurasia, Rahul; Bharath, K. K.
2017Hardware Vulnerabilities and Their Effects on CE Devices: Design for Security Against Trojans [Hardware Matters]Sengupta, Anirban
2020Introduction to hardware (IP) security: Forensic detective control and obfuscation of digital signal processing (DSP) coresSengupta, Anirban
2014MO-PSE: Adaptive multi-objective particle swarm optimization based design space exploration in architectural synthesis for application specific processor designMishra, Vipul Kumar; Sengupta, Anirban
2018Shielding CE Hardware Against Reverse-Engineering Attacks Through Functional Locking [Hardware Matters]Kachave, Deepak; Sengupta, Anirban
2023A Survey of High Level Synthesis Based Hardware Security Approaches for Reusable IP Cores [Feature]Anshul, Aditya; Sengupta, Anirban

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