1. IDR@IIT Indore

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Results 31-40 of 229 (Search time: 0.002 seconds).
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Issue DateTitleAuthor(s)
2020Protecting the rights of an IP buyer using cryptosystem-based multivariable fingerprintingSengupta, Anirban
2024Gen-Sign: HLS Based Watermarking Using IP Vendor's Feistel Cipher Encrypted Genomic Signature for Protecting CNN and Image Processing Filter Cores Against PiracySengupta, Anirban; Chourasia, Vishal; Singh, Ayush Kumar
2021Structural transformation-based obfuscation using pseudo-operation mixing for securing data-intensive IP coresSengupta, Anirban; Rathor, Mahendra
2014Time varying vs. fixed acceleration coefficient PSO driven exploration during high level synthesis: Performance and quality assessmentSengupta, Anirban; Mishra, Vipul Kumar
2013Swarm intelligence driven Design Space Exploration: An integrated framework for power-performance trade-off in architectural synthesisMishra, Vipul Kumar; Sengupta, Anirban
2021Cryptography-driven IP steganography for DSP hardware acceleratorsSengupta, Anirban
2017Protecting IP core during architectural synthesis using HLT-based obfuscationSengupta, Anirban; Roy, Dipanjan
2016Evolution of the IP Design Process in the Semiconductor/EDA Industry Hardware MattersSengupta, Anirban
2024Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLSChaurasia, Rahul; Sengupta, Anirban
2016Integrating physical level design and high level synthesis for simultaneous multi-cycle transient and multiple transient fault resiliency of application specific datapath processorsKachave, Deepak; Sengupta, Anirban

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