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Issue Date	Title	Author(s)
2015	Design space exploration of datapath (architecture) in high-level synthesis for computation intensive applications	Sengupta, Anirban
2017	A Framework for Hardware Efficient Reusable IP Core for Grayscale Image CODEC	Sengupta, Anirban; Roy, Dipanjan
2017	Low-cost security aware HLS methodology	Sengupta, Anirban
2017	Hardware Vulnerabilities and Their Effects on CE Devices: Design for Security Against Trojans [Hardware Matters]	Sengupta, Anirban
2018	Shielding CE Hardware Against Reverse-Engineering Attacks Through Functional Locking [Hardware Matters]	Kachave, Deepak; Sengupta, Anirban
2023	Revisiting Black-Hat HLS: A Lightweight Countermeasure to HLS-Aided Trojan Attack	Sengupta, Anirban
2018	A firefly algorithm driven approach for high level synthesis	Sengupta, Anirban; Rathlavat, Santosh
2017	Designing Low-Cost Hardware Accelerators for CE Devices [Hardware Matters]	Sengupta, Anirban; Rathlavat, Santosh
2019	Protecting DSP Kernels Using Robust Hologram-Based Obfuscation	Sengupta, Anirban; Rathor, Mahendra
2022	Security Vs Design Cost of Signature Driven Security Methodologies for Reusable Hardware IP Core	Chaurasia, Rahul; Sengupta, Anirban