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Results 1-10 of 29 (Search time: 0.001 seconds).
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Issue Date
Title
Author(s)
2017
Low-cost security aware HLS methodology
Sengupta, Anirban
2021
Contact-less palmprint biometric for securing DSP coprocessors used in CE systems
Sengupta, Anirban
;
Chaurasia, Rahul
;
Reddy, Tarun
2017
Hardware Vulnerabilities and Their Effects on CE Devices: Design for Security Against Trojans [Hardware Matters]
Sengupta, Anirban
2023
Exploration of optimal crypto-chain signature embedded secure JPEG-CODEC hardware IP during high level synthesis
Anshul, Aditya
;
Sengupta, Anirban
2024
Hardware Security of Image Processing Cores Against IP Piracy Using PSO-Based HLS-Driven Multi-Stage Encryption Fused with Fingerprint Signature
Sengupta, Anirban
;
Anshul, Aditya
2024
Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLS
Chaurasia, Rahul
;
Sengupta, Anirban
2020
Securing Hardware Accelerators for CE Systems Using Biometric Fingerprinting
Sengupta, Anirban
;
Rathor, Mahendra
2020
Obfuscating DSP Hardware Accelerators in CE Systems Using Pseudo Operations Mixing
Rathor, Mahendra
;
Sengupta, Anirban
2019
Hardware Steganography for IP Core Protection of Fault Secured DSP Cores
Sengupta, Anirban
;
Gupta, Gargi
;
Jalan, Harshit
2017
Low cost optimized Trojan secured schedule at behavioral level for single & Nested loop control data flow graphs (Invited Paper)
Sengupta, Anirban
;
Roy, Dipanjan
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Type of Material
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8
Anshul, Aditya
7
Rathor, Mahendra
3
Chaurasia, Rahul
3
Roy, Dipanjan
2
Chourasia, Vishal
2
Kothari, Chirag
2
Thakur, Sumer
1
Bhui, Nabendu
1
Dawar, Praveen
1
Gupta, Gargi
1
Jalan, Harshit
1
Kachave, Deepak
1
Kumar, Nilesh
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8
Digital signal processing
8
High level synthesis
7
Hardware
7
HLS
7
Malware
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Costs
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Intellectual property core
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Trojans
4
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2024
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