1. IDR@IIT Indore

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Results 1-10 of 30 (Search time: 0.002 seconds).
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Issue DateTitleAuthor(s)
2017Low overhead symmetrical protection of reusable IP core using robust fingerprinting and watermarking during high level synthesisRoy, Dipanjan; Sengupta, Anirban
2022IP Core Protection of Image Processing Filters with Multi-Level Encryption and Covert Steganographic Security ConstraintsAnshul, Aditya; Sengupta, Anirban
2017DSP design protection in CE through algorithmic transformation based structural obfuscationSengupta, Anirban; Roy, Dipanjan
2017A Framework for Hardware Efficient Reusable IP Core for Grayscale Image CODECSengupta, Anirban; Roy, Dipanjan
2018Shielding CE Hardware Against Reverse-Engineering Attacks Through Functional Locking [Hardware Matters]Kachave, Deepak; Sengupta, Anirban
2019Embedding Digital Signature Using Encrypted-Hashing for Protection of DSP Cores in CESengupta, Anirban; Kumar, E. Ranjith; Chandra, N. Prajwal
2017Protecting IP core during architectural synthesis using HLT-based obfuscationSengupta, Anirban; Roy, Dipanjan
2019Robust Logic locking for Securing Reusable DSP CoresRathor, Mahendra; Sengupta, Anirban
2019Protecting DSP Kernels Using Robust Hologram-Based ObfuscationSengupta, Anirban; Rathor, Mahendra
2019Hardware Steganography for IP Core Protection of Fault Secured DSP CoresSengupta, Anirban; Gupta, Gargi; Jalan, Harshit

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