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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Hemantha Kumar, Ravi;Vishvakarma, Santosh Kumar; | en_US |
| dc.date.accessioned | 2022-11-03T19:54:53Z | - |
| dc.date.available | 2022-11-03T19:54:53Z | - |
| dc.date.issued | 2022 | - |
| dc.identifier.citation | Kumar, R., Nagulapalli, R., Hake, R., & Vishvakarma, S. K. (2022). A low-power 2-to-7 modulus programmable prescaler with 50% output duty cycle. Paper presented at the International Conference on Electrical, Computer, and Energy Technologies, ICECET 2022, doi:10.1109/ICECET55527.2022.9873078 Retrieved from www.scopus.com | en_US |
| dc.identifier.isbn | 978-1665470872 | - |
| dc.identifier.other | EID(2-s2.0-85138950866) | - |
| dc.identifier.uri | https://doi.org/10.1109/ICECET55527.2022.9873078 | - |
| dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/10996 | - |
| dc.description.abstract | This paper presents a novel optimized low-power multi-modulus programmable frequency divider with a modulus range of 2-to-7 with 50% output duty cycle for high-speed applications. The proposed divider is demonstrated with the division range from 2-127, which can be extended by adding more stages of the 2/3 Prescaler in the divider chain. The whole design is implemented using 0.18- μm CMOS process with a supply of 1.8 V. From simulations result, the proposed design achieves a maximum operating frequency of 5 GHz with 6.5 mW of power consumption in divide-by-127 mode of operation while providing the 50% output duty cycle. © 2022 IEEE. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
| dc.source | International Conference on Electrical, Computer, and Energy Technologies, ICECET 2022 | en_US |
| dc.subject | Frequency dividing circuits; Counter; D flip flops; D flip-flop; Duty-cycle; High Speed; Low Power; Multi-modulus; Multi-modulus prescaler; Phase clocks; Prescalers; Programmable frequency divider; Programmable frequency divider true single-phase clock; Single phasis; Flip flop circuits | en_US |
| dc.title | A Low-Power 2-to-7 Modulus Programmable Prescaler with 50% Output Duty Cycle | en_US |
| dc.type | Conference Paper | en_US |
| Appears in Collections: | Department of Electrical Engineering | |
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