Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/11082
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dc.contributor.authorRaut, Gopalen_US
dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2022-11-21T14:27:23Z-
dc.date.available2022-11-21T14:27:23Z-
dc.date.issued2022-
dc.identifier.citationRangarajan, N., Patnaik, S., Nabeel, M., Ashraf, M., Rai, S., Raut, G., . . . Sinanoglu, O. (2022). SCRAMBLE: A secure and configurable, memristor-based neuromorphic hardware leveraging 3D architecture. Paper presented at the Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, , 2022-July 308-313. doi:10.1109/ISVLSI54635.2022.00067 Retrieved from www.scopus.comen_US
dc.identifier.isbn978-1665466059-
dc.identifier.issn2159-3469-
dc.identifier.otherEID(2-s2.0-85140920230)-
dc.identifier.urihttps://doi.org/10.1109/ISVLSI54635.2022.00067-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/11082-
dc.description.abstractIn this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs. © 2022 IEEE.en_US
dc.language.isoenen_US
dc.publisherIEEE Computer Societyen_US
dc.sourceProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSIen_US
dc.subjectBenchmarkingen_US
dc.subjectEconomic and social effectsen_US
dc.subjectThree dimensional integrated circuitsen_US
dc.subject3D architecturesen_US
dc.subjectActivation functionsen_US
dc.subjectHardware IPen_US
dc.subjectMemory cellen_US
dc.subjectMemristoren_US
dc.subjectNeuromorphic Architecturesen_US
dc.subjectNeuromorphic hardwaresen_US
dc.subjectProof of concepten_US
dc.subjectProposed architecturesen_US
dc.subjectWeight functionsen_US
dc.subjectMemristorsen_US
dc.titleSCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architectureen_US
dc.typeConference Paperen_US
Appears in Collections:Department of Electrical Engineering

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