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https://dspace.iiti.ac.in/handle/123456789/16506
Title: | A hard Real-time Kernel for CPIoT systems with Safety Features in Rust |
Authors: | Gupta, Nayancy Banda, Gourinath Hubballi, Neminath |
Keywords: | Boolean vectors;Cyber physical Internet of Things;Real-time kernels;Rust language |
Issue Date: | 2025 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Citation: | Gupta, N., Banda, G., Hubballi, N., & Srinivas, K. V. (2025). A hard Real-time Kernel for CPIoT systems with Safety Features in Rust. IEEE Access. https://doi.org/10.1109/ACCESS.2025.3586018 |
Abstract: | The increasing deployment of Cyber-Physical Internet of Things (CPIoT) systems in safety-critical domains demands execution environments with strict real-time guarantees, memory safety, and high reliability. Existing real-time operating systems and kernels (RT-OS/Kernels), predominantly developed in C/C++, are prone to memory corruption, jitter, and non-deterministic execution due to blocking primitives and queue-based scheduling. This paper proposes HarSaRK-RS, a hard real-time kernel implemented in Rust, designed to address these limitations through compile-time safety, modular resource management and constant-time task scheduling. HarSaRK employs a boolean-vector-based scheduling and synchronization model that replaces queues, ensuring low-jitter and deterministic execution. It supports both single-core and dual-core microcontrollers using the Stack-Based Priority Ceiling (SBPC) Protocol and the Multiprocessor Resource Sharing Protocol (MRSP), respectively. A hardware-assisted IP-connectivity solution, realized via ESP8266 and managed through an interrupt-driven high-priority task, enables non-blocking internet communication for CPIoT applications. Experimental evaluation on STM32 and NXP LPC55S69 platforms demonstrates the kernel’s predictable latency, low memory footprint, and efficient multicore task migration. HarSaRK establishes an efficient foundation for next-generation CPIoT deployments, combining Rust’s safety guarantees with a real-time tasking model. Our proposed kernel achieves (a) context switch time reductions ranging from a few processor cycles to up to 6×, and (b) task switch time improvements between 2× and 6×. © 2013 IEEE. |
URI: | https://dx.doi.org/10.1109/ACCESS.2025.3586018 https://dspace.iiti.ac.in:8080/jspui/handle/123456789/16506 |
ISSN: | 2169-3536 |
Type of Material: | Journal Article |
Appears in Collections: | Department of Computer Science and Engineering |
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