Leveraging Multi-Layer Crypto-Logic Cross-Coupled with Encoded Code Converter and Conditional Control Flow for Robust Key-Based HLS IP Watermarking

Abstract

Intellectual Property (IP) piracy and fraud IP ownership threats play a pivotal role in compromising the security of a system-on-chip (SoC) design. Further, these threats ominously jeopardize the reputation and goodwill of an IP vendor in the global design supply chain. Countering these hardware threats effectively is therefore the need of the hour. This paper introduces a novel key-based high-level synthesis (HLS) IP watermarking that leverages multi-layer crypto-logic cross-coupled with encoded code converter and conditional control flow. The proposed IP watermarking leverages several security layers such as: operation encoding rule, BCD conditional flow, Trifid cipher, code-converter, conditional control function, SLT immediate function, xor-ing, SHA function and watermark constraint embedding rule. The proposed watermarking is robust and provides boosted security in terms of lower probability of coincidence (digital evidence) and sturdier tamper tolerance than prior techniques, at zero design cost overhead. © 2025 IEEE.