Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/18169
Title: Secure and Optimized IP design using Key-driven Cipher-Based Multi-layer Encrypted HLS Watermarking integrated with FA based Exploration
Authors: Sengupta, Anirban
Chourasia, Vishal
Bhui, Nabendu
Issue Date: 2025
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Sengupta, A., Chourasia, V., & Bhui, N. (2025). Secure and Optimized IP design using Key-driven Cipher-Based Multi-layer Encrypted HLS Watermarking integrated with FA based Exploration. Proceedings of the International Conference on Microelectronics, ICM. https://doi.org/10.1109/ICM66518.2025.11322512
Abstract: Intellectual Property (IP) designs play a pivotal role in the development of modern system-on-chips (SoCs). However, due to globalization in the modern design supply chain of integrated circuits, IP designs have become prone to external hardware threats of IP piracy and fraud IP ownership attack. This paper presents a novel methodology for secure and optimized IP design using key-driven cipher based multi-layer encrypted high level synthesis (HLS) watermarking integrated with firefly algorithm-based exploration. The proposed security approach is more robust and secure than prior IP watermarking techniques in terms of lower probability of coincidence, higher tamper tolerance ability and lower probability of decoding attack (key-bits), at zero design overhead (watermark area and latency). © 2025 IEEE.
URI: https://dx.doi.org/10.1109/ICM66518.2025.11322512
https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18169
ISBN: 979-833159370-4
ISSN: 2332-7014
Type of Material: Conference Paper
Appears in Collections:Department of Computer Science and Engineering

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