Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/18374
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dc.contributor.authorSharma, Prathamen_US
dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2026-05-14T12:28:28Z-
dc.date.available2026-05-14T12:28:28Z-
dc.date.issued2026-
dc.identifier.citationSharma, P., & Vishvakarma, S. K. (2026). PRISM: Photonic Reconfigurable In-Situ Memory for Next-Gen AI Workloads. Proceedings - 2026 39th International Conference on VLSI Design and 25th International Conference on Embedded Systems, VLSID 2026, 85–90. https://doi.org/10.1109/VLSID68508.2026.00029en_US
dc.identifier.isbn979-833159040-6-
dc.identifier.otherEID(2-s2.0-105036831268)-
dc.identifier.urihttps://dx.doi.org/10.1109/VLSID68508.2026.00029-
dc.identifier.urihttps://dspace.iiti.ac.in:8080/jspui/handle/123456789/18374-
dc.description.abstractPhotonic accelerators addresses the limitations of bandwidth, latency, and energy found in traditional electronic computing, especially for data-heavy applications like AI inference. Photonic compute-in-memory (PCIM) architectures bring together storage and computation within the optical realm, avoiding the expensive process of optical-electrical conversions. This study introduces a fully passive optical memory cell that is semiconductor optical amplifier (SOA) free and its expansion into a PCIM bitcell capable of performing AND operation. The design comprises directional couplers, a phase shifter, nonlinear fiber, and a delay loop, achieving bistable performance at 50 ~Gb/s with switching times under one nanosecond, balanced rise and fall times, and a bit error rate (BER) of less than 10-9, surpassing earlier memory configurations. In its PCIM mode, the bitcell can perform logical AND operation, creating a memory-logic system. A scalable 16 Kb array of photonic memory is proposed, providing row and column addressability along with adaptability for integration into advanced computing systems. Future work will focus on deploying convolutional neural networks, like LeNet-5, on the proposed PCIM array for real-time inference, aiming for high accuracy while minimizing latency and power use which highlights the potential of completely passive PCIM architectures for next generation high-performance computing. © 2026 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceProceedings - 2026 39th International Conference on VLSI Design and 25th International Conference on Embedded Systems, VLSID 2026en_US
dc.titlePRISM: Photonic Reconfigurable In-Situ Memory for Next-Gen AI Workloadsen_US
dc.typeConference Paperen_US
Appears in Collections:Department of Electrical Engineering

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