Timer-Driven HLS Trojan Attack on Medical System Hardware

Abstract

High Level Synthesis (HLS) plays a pivotal role in the design of important hardware intellectual property (IP) cores used in medical systems. Very recently research has revealed how HLS can be exploited to design IPs for cardiac pacemaker and electrocardiogram (ECG) detector. However, despite the significance of HLS framework in designing hardware IPs for medical systems, they simultaneously expose inherent/critical security vulnerabilities in the design process. For example, an unwarranted Trojan-induced delay in cardiac activity of pacemaker can wreak havoc in a patient's body. In this paper, we investigate and present, for the first time in the literature, how HLS hardware Trojan (HT) can be exploited by an attacker (malicious HLS tool developer) to covertly insert and compromise medical system hardware. The paper presents a novel timer-driven threat vector for medical system hardware IPs used in pacemaker and ECG devices, which can yield delay degradation as Trojan payload. The proposed timer-driven HLS-HT is stealthy and furtive by nature as it can evade standard detection techniques. Results of the experiments revealed that the proposed HLS-HT can achieve undesired delay (latency) degradation in pacemaker and ECG detector, at nominal area/power overhead. � 2025 IEEE.