Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/18637
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dc.contributor.authorLokhande, Mukulen_US
dc.contributor.authorSharma, Vijay P.en_US
dc.contributor.authorChand, S.V. Jayaen_US
dc.contributor.authorKumar, Sonuen_US
dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2026-07-09T06:48:14Z-
dc.date.available2026-07-09T06:48:14Z-
dc.date.issued2026-
dc.identifier.citationLokhande, M., Sharma, V. P., Chand, S. V. J., Kumar, S., Teman, A., & Vishvakarma, S. K. (2026). Trans-precision NPU for resource-efficient mobile AI acceleration. Journal of Systems Architecture, 177. https://doi.org/10.1016/j.sysarc.2026.103866en_US
dc.identifier.issn1383-7621-
dc.identifier.otherEID(2-s2.0-105040691654)-
dc.identifier.urihttps://dx.doi.org/10.1016/j.sysarc.2026.103866-
dc.identifier.urihttps://dspace.iiti.ac.in:8080/jspui/handle/123456789/18637-
dc.description.abstractThis paper introduces the Trans-precision NPU (T-NPU), a resource-efficient, multi-mode neural processing unit for mobile AI acceleration using a unified multi-precision datapath. At its core is a Single Instruction Multiple Data (SIMD) trans-precision multiply-accumulate unit (T-MAC) supporting heterogeneous formats, including FP4/FP8, INT4/INT8, and Posit-8/16, enabling flexible computation with improved throughput. The design uses a reconfigurable datapath that shares logic between exponent and mantissa processing to boost arithmetic intensity and energy efficiency. T-MAC integrates the DA-VINCI activation function to form a fundamental processing element for diverse workloads such as DNNs, Transformers, reinforcement learning, and generative AI. We evaluate an AXI-enabled unified core combining a systolic array and vector engine, integrated with a RISC-V CVA6 core and memory via the Cheshire framework. Results show a 14 pJ PDP, 2.4× better energy efficiency in 28 nm CMOS, and 1.8× fewer FPGA LUTs. MobileNet-SSD with KALAM-16 encoding shows ∼0.6% accuracy loss and 4.47 TOPS/W. © 2026 Elsevier B.V.en_US
dc.language.isoenen_US
dc.publisherElsevier B.V.en_US
dc.sourceJournal of Systems Architectureen_US
dc.titleTrans-precision NPU for resource-efficient mobile AI accelerationen_US
dc.typeJournal Articleen_US
Appears in Collections:Centre for Advanced Electronics (CAE)
Department of Electrical Engineering

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