Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/2433
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dc.contributor.advisorAnbarasu, M.-
dc.contributor.advisorUmarikar, Amod C.-
dc.contributor.authorD, Suresh-
dc.date.accessioned2020-09-17T10:58:03Z-
dc.date.accessioned2020-09-17T10:58:10Z-
dc.date.available2020-09-17T10:58:03Z-
dc.date.available2020-09-17T10:58:10Z-
dc.date.issued2020-06-10-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/2433-
dc.description.abstractThis thesis work is conducted to address the critical issues as discussed in the previous section. The mushroom-type and pore-type device architectures employing Ge2Sb2Te5 material are being most studied and utilized in commercial products. Therefore, these devices are chosen for the reduction of IRESET. Also, the reliability issues, namely device variability and soft-error, are further investigated for the standard mushroom-type scaled-down PCM devices. The objectives of the thesis are as follows: (1) Investigation of the impact of thermal boundary resistance and electrical interface resistance on the performance and scaling of the phase-change memory device (Chapter 3). (2) Investigation of an extremely fast, energy-efficient RESET process in the phase-change memory device by the choice of electrode materials and interfacial effects (Chapter 4). (3) Study of process-induced variability on the performance of scalable phase-change memory devices (Chapter 5). (4) Understanding the impact of heavy-ion induced single event upsets in phase-change memory devices (Chapter 6)en_US
dc.language.isoenen_US
dc.publisherDepartment of Electrical Engineering, IIT Indoreen_US
dc.relation.ispartofseriesTH274-
dc.subjectElectrical Engineeringen_US
dc.titleImpact of interfacial effects, process variation and heavy-Ion irradiation on the performance of scalable phase change memory devicesen_US
dc.typeThesis_Ph.Den_US
Appears in Collections:Department of Electrical Engineering_ETD

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