Insights into devices physics, operating mechanism and design optimization of multi-functional reconfigurable transistors

Abstract

New transistor structures have been proposed to continue downscaling as forecasted by Moore's law. These include FinFET, Tunnel FET (TFET), Gate All Around FET (GAA FET), and stacked nanosheet transistors. However, these architectures require different type of devices for realizing n-type and p-type MOSFETs. One of the possible ways to use a single device and achieve either n-type or p-type performance is through programming via applied bias. Such transistor architectures are known as Reconfigurable Transistors (RFET). RFET consists of a Schottky Barrier (SB) at source/drain end and operates on the principle of tunneling similar to that of a SB-MOSFET but with one significant difference of an extra gate, polarity gate (PG), which controls the Schottky barrier width and suppressing the ambipolar behavior. The other gate, control gate (CG), is responsible for channel formation. The high on-current to off-current ratio, reversible operation, and other benefits of RFET have brought great interest in it. Schottky barrier, threshold voltage and total resistance are key parameters that determine the performance of RFET. The thesis investigates the affect of workfunction of polarity and control gates, and source/drain apart from individual gate lengths and un-gated region on key metrics. The work function of source/drain (S/D) affects the SB height, while the work function of PG affects the width of SB, and the work function of CG governs the threshold voltage. The gate length affects the resistance in the channel. The optimization of these parameters is essential for ensuring symmetric behavior of n-type and p-type RFETs. The impact of asymmetry in RFET is also analyzed. The extraction of series resistance along with individual constitutent components of RFET helps to understand the reason for drain current and allows for possible optimization of the device. The transconductance characteristics are investigated and results correlated with polarity gate bias. The work will be useful for understanding the factors limiting the current drive of a RFET and enable further optimization to overcome the bottlenecks faced by RFETs.