Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4515
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dc.contributor.authorSengupta, Anirbanen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:34:44Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:34:44Z-
dc.date.issued2020-
dc.identifier.citationSengupta, A. (2020). Frontiers in securing IP cores. Frontiers in securing IP cores (pp. 1-345) doi:10.1049/PBCS067Een_US
dc.identifier.isbn9781839530319-
dc.identifier.otherEID(2-s2.0-85114587423)-
dc.identifier.urihttps://doi.org/10.1049/PBCS067E-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4515-
dc.description.abstractThis book presents advanced forensic detective control and obfuscation techniques for securing hardware IP cores by exploring beyond conventional technologies. The theme is important to researchers in various areas of specialization, because it encompasses the overlapping topics of EDA-CAD, hardware design security, VLSI design, IP core protection, optimization using evolutionary computing, system-on-chip design and finally application specific processor/hardware accelerator design for consumer electronics applications. The book begins by introducing forensic detective control and obfuscation mechanisms for hardware and IP core security. Further chapters cover hardware stenography, digital signature driven hardware authentication, fault-secured IP cores using digital signature-based watermarks, multi-level watermarking, cryptosystem-based multi-variable fingerprinting, multi-phase and hologram-based obfuscation, and security of functionally obfuscated DSP cores. © The Institution of Engineering and Technology 2020.en_US
dc.language.isoenen_US
dc.publisherInstitution of Engineering and Technologyen_US
dc.sourceFrontiers in Securing IP Coresen_US
dc.titleFrontiers in securing IP coresen_US
dc.typeBooken_US
Appears in Collections:Department of Computer Science and Engineering

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