Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4553
Title: High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era
Authors: Sengupta, Anirban
Keywords: Cesium compounds;High level synthesis;Mixed signal integrated circuits;Timing circuits;Device sizes;Digital designs;Electronic systems;Mixed signal;Mobile electronics;Nano scale;Technology scaling;Transistor count;Digital integrated circuits
Issue Date: 2016
Publisher: Institution of Engineering and Technology
Citation: Sengupta, A., & Mohanty, S. P. (2016). High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era. Nano-CMOS and post-CMOS electronics: Circuits and design (pp. 219-266) doi:10.1049/PBCS030E_ch8
Abstract: Digital integrated circuits (ICs) are the main workhorse of all modern consumer electronic systems. Digital ICs are much more complex and more closely follow the technology scaling as compared to the analog or mixed-signal ICs. For example, the transistor count can be in billions the device sizes at this point can be 14 nm FinFET in the digital ICs. However, the good news for digital ICs is that the digital designs have well-defined abstractions including system, architecture, logic. This Chapter is focused at the architecture level of the digital ICs. In particular, detailed discussions of high-level synthesis technique has been presented that can generate digital ICs. Trust of electronic systems that are used in day-to-day life is critical. This Chapter also discusses the HLS technique that can generate trusted digital ICs. © The Institution of Engineering and Technology 2016.
URI: https://doi.org/10.1049/PBCS030E_ch8
https://dspace.iiti.ac.in/handle/123456789/4553
ISBN: 9781785610004; 9781849199995
Type of Material: Book Chapter
Appears in Collections:Department of Computer Science and Engineering

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