Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4609
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dc.contributor.authorRathor, Mahendraen_US
dc.contributor.authorSengupta, Anirbanen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:34:57Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:34:57Z-
dc.date.issued2019-
dc.identifier.citationRathor, M., & Sengupta, A. (2019). Enhanced functional obfuscation of DSP core using flip-flops and combinational logic. Paper presented at the IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin, , 2019-January 7-11. doi:10.1109/ICCE-Berlin47944.2019.9127236en_US
dc.identifier.issn2166-6814-
dc.identifier.otherEID(2-s2.0-85089884641)-
dc.identifier.urihttps://doi.org/10.1109/ICCE-Berlin47944.2019.9127236-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4609-
dc.description.abstractDue to globalization of Integrated Circuit (IC) design flow, Intellectual Property (IP) cores have increasingly become susceptible to various hardware threats such as Trojan insertion, piracy, overbuilding etc. An IP core can be secured against these threats using functional obfuscation based security mechanism. This paper presents a functional obfuscation of digital signal processing (DSP) core for consumer electronics systems using a novel IP core locking block (ILB) logic that leverages the structure of flip-flops and combinational circuits. These ILBs perform the locking of the functionality of a DSP design and actuate the correct functionality only on application of a valid key sequence. In existing approaches so far, executing exhaustive trials are sufficient to extract the valid keys from an obfuscated design. However, proposed work is capable of hindering the extraction of valid keys even on exhaustive trials, unless successfully applied in the first attempt only. In other words, the proposed work drastically reduces the probability of obtaining valid key of a functionally obfuscated design in exhaustive trials. Experimental results indicate that the proposed approach achieves higher security and lower design overhead than previous works. © 2019 IEEE.en_US
dc.language.isoenen_US
dc.publisherIEEE Computer Societyen_US
dc.sourceIEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlinen_US
dc.subjectComputer circuitsen_US
dc.subjectFlip flop circuitsen_US
dc.subjectIntellectual property coreen_US
dc.subjectKeys (for locks)en_US
dc.subjectLocks (fasteners)en_US
dc.subjectMalwareen_US
dc.subjectCombinational logicen_US
dc.subjectDesign flowsen_US
dc.subjectDigital signal processing (DSP)en_US
dc.subjectDSP coreen_US
dc.subjectSecurity mechanismen_US
dc.subjectTrojansen_US
dc.subjectDigital signal processingen_US
dc.titleEnhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logicen_US
dc.typeConference Paperen_US
Appears in Collections:Department of Computer Science and Engineering

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