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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kachave, Deepak | en_US |
dc.contributor.author | Sengupta, Anirban | en_US |
dc.date.accessioned | 2022-03-17T01:00:00Z | - |
dc.date.accessioned | 2022-03-17T15:35:05Z | - |
dc.date.available | 2022-03-17T01:00:00Z | - |
dc.date.available | 2022-03-17T15:35:05Z | - |
dc.date.issued | 2017 | - |
dc.identifier.citation | Kachave, D., & Sengupta, A. (2017). Protecting ownership of reusable IP core generated during high level synthesis. Paper presented at the Proceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, 80-82. doi:10.1109/iNIS.2016.029 | en_US |
dc.identifier.isbn | 9781509061693 | - |
dc.identifier.other | EID(2-s2.0-85013808106) | - |
dc.identifier.uri | https://doi.org/10.1109/iNIS.2016.029 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/4655 | - |
dc.description.abstract | Protection of reusable intellectual property (IP) core from vendor's perspective is extremely critical to resolve false claim of ownership problem. However solving the aforesaid is non-Trivial as it involves identification of the original creator through some scientific computational methodology. This paper presents a novel computational forensic engineering (CFE) based approach for protecting reusable IP cores generated during high level synthesis that is robust, overhead free and reliable. © 2016 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
dc.source | Proceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016 | en_US |
dc.subject | Forensic engineering | en_US |
dc.subject | High level synthesis | en_US |
dc.subject | Information systems | en_US |
dc.subject | Nanoelectronics | en_US |
dc.subject | Computational forensics | en_US |
dc.subject | Computational methodology | en_US |
dc.subject | Non-trivial | en_US |
dc.subject | Ownership | en_US |
dc.subject | Protection | en_US |
dc.subject | Vendor | en_US |
dc.subject | Intellectual property core | en_US |
dc.title | Protecting ownership of reusable IP core generated during high level synthesis | en_US |
dc.type | Conference Paper | en_US |
Appears in Collections: | Department of Computer Science and Engineering |
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