Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4655
Full metadata record
DC FieldValueLanguage
dc.contributor.authorKachave, Deepaken_US
dc.contributor.authorSengupta, Anirbanen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:35:05Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:35:05Z-
dc.date.issued2017-
dc.identifier.citationKachave, D., & Sengupta, A. (2017). Protecting ownership of reusable IP core generated during high level synthesis. Paper presented at the Proceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, 80-82. doi:10.1109/iNIS.2016.029en_US
dc.identifier.isbn9781509061693-
dc.identifier.otherEID(2-s2.0-85013808106)-
dc.identifier.urihttps://doi.org/10.1109/iNIS.2016.029-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4655-
dc.description.abstractProtection of reusable intellectual property (IP) core from vendor's perspective is extremely critical to resolve false claim of ownership problem. However solving the aforesaid is non-Trivial as it involves identification of the original creator through some scientific computational methodology. This paper presents a novel computational forensic engineering (CFE) based approach for protecting reusable IP cores generated during high level synthesis that is robust, overhead free and reliable. © 2016 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceProceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016en_US
dc.subjectForensic engineeringen_US
dc.subjectHigh level synthesisen_US
dc.subjectInformation systemsen_US
dc.subjectNanoelectronicsen_US
dc.subjectComputational forensicsen_US
dc.subjectComputational methodologyen_US
dc.subjectNon-trivialen_US
dc.subjectOwnershipen_US
dc.subjectProtectionen_US
dc.subjectVendoren_US
dc.subjectIntellectual property coreen_US
dc.titleProtecting ownership of reusable IP core generated during high level synthesisen_US
dc.typeConference Paperen_US
Appears in Collections:Department of Computer Science and Engineering

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetric Badge: