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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Sengupta, Anirban | en_US |
dc.date.accessioned | 2022-03-17T01:00:00Z | - |
dc.date.accessioned | 2022-03-17T15:35:38Z | - |
dc.date.available | 2022-03-17T01:00:00Z | - |
dc.date.available | 2022-03-17T15:35:38Z | - |
dc.date.issued | 2021 | - |
dc.identifier.citation | Hu, W., Chang, C. -., Sengupta, A., Bhunia, S., Kastner, R., & Li, H. (2021). An overview of hardware security and trust: Threats, countermeasures, and design tools. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(6), 1010-1038. doi:10.1109/TCAD.2020.3047976 | en_US |
dc.identifier.issn | 0278-0070 | - |
dc.identifier.other | EID(2-s2.0-85099090581) | - |
dc.identifier.uri | https://doi.org/10.1109/TCAD.2020.3047976 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/4821 | - |
dc.description.abstract | Hardware security and trust have become a pressing issue during the last two decades due to the globalization of the semiconductor supply chain and ubiquitous network connection of computing devices. Computing hardware is now an attractive attack surface for launching powerful cross-layer security attacks, allowing attackers to infer secret information, hijack control flow, compromise system root-of-trust, steal intellectual property (IP), and fool machine learners. On the other hand, security practitioners have been making tremendous efforts in developing protection techniques and design tools to detect hardware vulnerabilities and fortify hardware design against various known hardware attacks. This article presents an overview of hardware security and trust from the perspectives of threats, countermeasures, and design tools. By introducing the most recent advances in hardware security research and developments, we aim to motivate hardware designers and electronic design automation tool developers to consider the new challenges and opportunities of incorporating an additional dimension of security into robust hardware design, testing, and verification. © 1982-2012 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
dc.source | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | en_US |
dc.subject | Computer aided design | en_US |
dc.subject | Supply chains | en_US |
dc.subject | Ubiquitous computing | en_US |
dc.subject | Computing hardware | en_US |
dc.subject | Cross-layer securities | en_US |
dc.subject | Electronic design automation tools | en_US |
dc.subject | Hardware designers | en_US |
dc.subject | Protection techniques | en_US |
dc.subject | Security and trusts | en_US |
dc.subject | Security practitioners | en_US |
dc.subject | Ubiquitous networks | en_US |
dc.subject | Hardware security | en_US |
dc.title | An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools | en_US |
dc.type | Review | en_US |
Appears in Collections: | Department of Computer Science and Engineering |
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