Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4849
Full metadata record
DC FieldValueLanguage
dc.contributor.authorSengupta, Anirbanen_US
dc.contributor.authorRathor, Mahendraen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:35:44Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:35:44Z-
dc.date.issued2020-
dc.identifier.citationSengupta, A., & Rathor, M. (2020). Obfuscated hardware accelerators for image processing filters - application specific and functionally reconfigurable processors. IEEE Transactions on Consumer Electronics, 66(4), 386-395. doi:10.1109/TCE.2020.3027760en_US
dc.identifier.issn0098-3063-
dc.identifier.otherEID(2-s2.0-85091939515)-
dc.identifier.urihttps://doi.org/10.1109/TCE.2020.3027760-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4849-
dc.description.abstractHardware accelerators are widely used as computationally-intensive cores in consumer electronics (CE) applications. However security and speed of such hardware accelerators, that are responsible for computing data-intensive tasks, play an important role in improving consumer experience in terms of safety and performance. This article presents novel low power multi-modal hardware accelerator architectures viz. application specific processor and functionally reconfigurable processor for image processing filter of $3\times 3$ kernel matrix size. In the proposed functionally reconfigurable processor of $3\times 3$ filter, the same design can be used for five different image processing filters - blurring, sharpening, vertical embossment, horizontal embossment and Laplace edge detection, by varying control input. Further, application specific processor designs of these five types of $3\times 3$ filters are also presented in this article. Additionally, application specific processor architecture of $5\times 5$ filter kernel matrix size is also reported in this article. The results confirm that the proposed hardware accelerators achieve strong security and low design cost. © 1975-2011 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceIEEE Transactions on Consumer Electronicsen_US
dc.subjectAccelerationen_US
dc.subjectComputer hardwareen_US
dc.subjectEdge detectionen_US
dc.subjectHardware securityen_US
dc.subjectIntegrated circuit designen_US
dc.subjectMatrix algebraen_US
dc.subjectReconfigurable hardwareen_US
dc.subjectApplication specificen_US
dc.subjectApplication specific processorsen_US
dc.subjectApplication-specific processor designen_US
dc.subjectHardware accelerator architectureen_US
dc.subjectHardware acceleratorsen_US
dc.subjectImage processing filtersen_US
dc.subjectReconfigurable processorsen_US
dc.subjectStrong securitiesen_US
dc.subjectImage processingen_US
dc.titleObfuscated Hardware Accelerators for Image Processing Filters - Application Specific and Functionally Reconfigurable Processorsen_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Computer Science and Engineering

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetric Badge: