Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4856
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dc.contributor.authorSengupta, Anirbanen_US
dc.contributor.authorRathor, Mahendraen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:35:46Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:35:46Z-
dc.date.issued2020-
dc.identifier.citationSengupta, A., & Rathor, M. (2020). Securing hardware accelerators for CE systems using biometric fingerprinting. IEEE Transactions on very Large Scale Integration (VLSI) Systems, 28(9), 1979-1992. doi:10.1109/TVLSI.2020.2999514en_US
dc.identifier.issn1063-8210-
dc.identifier.otherEID(2-s2.0-85090437425)-
dc.identifier.urihttps://doi.org/10.1109/TVLSI.2020.2999514-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4856-
dc.description.abstractThis article presents a novel methodology to secure hardware accelerators (such as digital signal processing (DSP) and multimedia intellectual property (IP) cores) against ownership threats/IP piracy using biometric fingerprinting. In this approach, an IP vendor's biometric fingerprint is first converted into a corresponding digital template, followed by embedding fingerprint's digital template into the design in the form of secret biometric constraints; thereby generating a secured hardware accelerator design. The results report the following qualitative and quantitative analysis of the proposed biometric fingerprint approach: 1) impact of 11 different fingerprints on probability of coincidence (Pc) metric. As evident, the proposed approach achieves a very low Pc value in the range of 2.22E-3 to 4.35E-6. Further, the biometric fingerprint achieves total constraints size between minimum 350 bits to maximum 895 bits; 2) impact of six different resource constraints on the design cost overhead of JPEG compression hardware postembedding biometric fingerprint. As evident, for all the resource constraints implemented, the design cost overhead is 0%; and 3) comparative analysis of proposed biometric fingerprint with recent work, for five different signature strength values, in terms of Pc. As evident, the proposed approach achieves minimum 3.9E+2 times and maximum 6.9E+4 times lower Pc, when compared to recent work. © 1993-2012 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceIEEE Transactions on Very Large Scale Integration (VLSI) Systemsen_US
dc.subjectBiometricsen_US
dc.subjectCost benefit analysisen_US
dc.subjectDigital signal processingen_US
dc.subjectFlow measurementen_US
dc.subjectImage compressionen_US
dc.subjectComparative analysisen_US
dc.subjectDigital signal processing (DSP)en_US
dc.subjectHardware acceleratorsen_US
dc.subjectJPEG compressionen_US
dc.subjectMultimedia Intellectual Propertyen_US
dc.subjectNovel methodologyen_US
dc.subjectQualitative and quantitative analysisen_US
dc.subjectResource Constrainten_US
dc.subjectHardware securityen_US
dc.titleSecuring Hardware Accelerators for CE Systems Using Biometric Fingerprintingen_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Computer Science and Engineering

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