Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5015
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dc.contributor.authorSengupta, Anirbanen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:36:29Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:36:29Z-
dc.date.issued2015-
dc.identifier.citationSengupta, A., & Sedaghat, R. (2015). Swarm intelligence driven design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis based on user power-delay budget. Microelectronics Reliability, 55(6), 990-1004. doi:10.1016/j.microrel.2015.03.010en_US
dc.identifier.issn0026-2714-
dc.identifier.otherEID(2-s2.0-84929024847)-
dc.identifier.urihttps://doi.org/10.1016/j.microrel.2015.03.010-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5015-
dc.description.abstractFault security indicates ability to provide error detection or fetch correct output. Fault security assures possibility of using either hardware redundancy or time redundancy to optimize the overheads associated with fault security. However, generation (design space exploration (DSE)) of an optimal fault secured datapath structure based on user power-delay budget during high level synthesis (HLS) in the context k-cycle transient fault is considered an intractable problem. This is due to the fact that for every type of candidate design solution produced during exploration, a feasible k-cycle fault secured datapath may not exist which satisfies the conflicting user constraints/budget. Secondly, insertion of inapt cut (resulting in an additional checkpoint) to optimize delay overhead associated with fault security in most cases may not result in optimal solutions in the context of user constraints/budgets. The solutions to the above problems have not been addressed in the literature so far. The paper therefore presents the following novelties: (a) an algorithm for fault secured DSE process (b) handling k-cycle transient faults during DSE (c) schemes for selecting appropriate edges for inserting cuts that selects available locations in the scheduled Control Data Flow Graph (CDFG) which minimizes delay overhead associated with fault security (d) swarm intelligence (particle swarm optimization) driven DSE process that adaptively/intelligently computes the candidate design solutions for generating an optimal fault secured datapath. Results of the proposed approach when tested on standard benchmarks yielded optimal results in most cases as evident from the data obtained for generational distance (GD), spacing (S), spreading (Δ) and weighted metric (Wm). Further, results of comparison with a recent approaches indicated significant reduction of final cost (better quality) for the proposed approach. © 2015 Elsevier Ltd. All rights reserved.en_US
dc.language.isoenen_US
dc.publisherElsevier Ltden_US
dc.sourceMicroelectronics Reliabilityen_US
dc.subjectBudget controlen_US
dc.subjectData flow analysisen_US
dc.subjectData flow graphsen_US
dc.subjectData transferen_US
dc.subjectGraph algorithmsen_US
dc.subjectGraphic methodsen_US
dc.subjectParticle swarm optimization (PSO)en_US
dc.subjectRadiation hardeningen_US
dc.subjectRedundancyen_US
dc.subjectSpace power generationen_US
dc.subjectSwarm intelligenceen_US
dc.subjectControl data flow graphsen_US
dc.subjectDSE, Secured DSEen_US
dc.subjectK -cycleen_US
dc.subjectMulti-objective design space explorationsen_US
dc.subjectSingle event upsetsen_US
dc.subjectHigh level synthesisen_US
dc.titleSwarm intelligence driven design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis based on user power-delay budgeten_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Computer Science and Engineering

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