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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Raut, Gopal | en_US |
dc.contributor.author | Rajput, Gunjan | en_US |
dc.contributor.author | Vishwakarma, Abhinav | en_US |
dc.contributor.author | Shah, Ambika Prasad | en_US |
dc.contributor.author | Vishvakarma, Santosh Kumar | en_US |
dc.date.accessioned | 2022-03-17T01:00:00Z | - |
dc.date.accessioned | 2022-03-17T15:38:53Z | - |
dc.date.available | 2022-03-17T01:00:00Z | - |
dc.date.available | 2022-03-17T15:38:53Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | Beohar, A., Raut, G., Rajput, G., Vishwakarma, A., Shah, A. P., Renewal, B. S., & Vishvakarma, S. K. (2019). Compact spiking neural network system with SiGe based cylindrical tunneling transistor for low power applications doi:10.1007/978-981-32-9767-8_54 | en_US |
dc.identifier.isbn | 9789813297661 | - |
dc.identifier.issn | 1865-0929 | - |
dc.identifier.other | EID(2-s2.0-85077130062) | - |
dc.identifier.uri | https://doi.org/10.1007/978-981-32-9767-8_54 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/5182 | - |
dc.description.abstract | In this paper, the spiking neural network has been implemented by using 3D tunneling device based on SiGe as a source for circuit applications. Here, Device circuit co-design investigations have been made in terms of device characteristics and circuit parameters using Synopsys 3D TCAD software and HSPICE simulation. The implemented circuit minimizes the spiking time with the help of tunneling transistors. The proposed tunneling device use the merits of low band gap material such as SiGe, used as a material in the source region with low spacer width, reduces the depletion of the fringing field over source gate edge, leads to high (ION). Whereas, drain underlap increases the drain channel resistance, and significantly reduces leakage current (IOFF). The spiking neural network circuit has been simulated by applying the test signal at the excitatory input to the benchmark circuit and observe the output response at the inhibitory node, it has a quick response and efficient spiking pulse train with negligible leakage current. © 2019, Springer Nature Singapore Pte Ltd. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Springer | en_US |
dc.source | Communications in Computer and Information Science | en_US |
dc.subject | Analog integrated circuits | en_US |
dc.subject | Drain current | en_US |
dc.subject | Energy gap | en_US |
dc.subject | Field effect transistors | en_US |
dc.subject | Neural networks | en_US |
dc.subject | Railroad tunnels | en_US |
dc.subject | Si-Ge alloys | en_US |
dc.subject | SPICE | en_US |
dc.subject | VLSI circuits | en_US |
dc.subject | Action potentials | en_US |
dc.subject | Annihilation | en_US |
dc.subject | Circuit application | en_US |
dc.subject | Device characteristics | en_US |
dc.subject | Low power application | en_US |
dc.subject | Spiking neural networks | en_US |
dc.subject | Spiking neuron networks | en_US |
dc.subject | Threshold point | en_US |
dc.subject | Low power electronics | en_US |
dc.title | Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power Applications | en_US |
dc.type | Conference Paper | en_US |
Appears in Collections: | Department of Electrical Engineering |
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