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Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5294
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dc.contributor.authorKranti, Abhinaven_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:39:16Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:39:16Z-
dc.date.issued2017-
dc.identifier.citationHsu, T. -., Lin, J. -., Huang, C. -., Lin, C. -., Kranti, A., Yu, C. -., . . . Lin, P. -. (2017). Vertical channel capacitor-less one-transistor DRAMs with a pass-way trench for improving retention time. Paper presented at the 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings, 869-871. doi:10.1109/ICSICT.2016.7999065en_US
dc.identifier.isbn9781467397179-
dc.identifier.otherEID(2-s2.0-85028689026)-
dc.identifier.urihttps://doi.org/10.1109/ICSICT.2016.7999065-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5294-
dc.description.abstractIn this paper, we propose a capacitor-less 1T-DRAM structure with the pass-way trench for improving the Retention Time (RT). We have improved the device fabrication process to form the pass-way trench of the structure which combines the Vertical Channel and the Gate-All-Around structure (PTVCT). The memory operation and its attractive performance in terms of programming window, retention time, and writing time are investigated. The pass-way trench improves programming window and retention time of the structure in comparison to conventional structure. © 2016 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.source2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedingsen_US
dc.subjectIntegrated circuitsen_US
dc.subjectCapacitor-lessen_US
dc.subjectConventional structuresen_US
dc.subjectDevice fabricationsen_US
dc.subjectGate-all-arounden_US
dc.subjectMemory operationsen_US
dc.subjectOne-transistor DRAMen_US
dc.subjectProgramming windowen_US
dc.subjectVertical channelsen_US
dc.subjectDynamic random access storageen_US
dc.titleVertical Channel Capacitor-less One-Transistor DRAMs with a pass-way Trench for improving Retention Timeen_US
dc.typeConference Paperen_US
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