1. IDR@IIT Indore
  2. IITI Scholarly Publications
  3. Department of Electrical Engineering
Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5319
Full metadata record
DC FieldValueLanguage
dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:41:31Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:41:31Z-
dc.date.issued2017-
dc.identifier.citationThakre, S., Beohar, A., Vijayvargiya, V., Yadav, N., & Vishvakarma, S. K. (2017). Investigation of DC characteristic on DG-tunnel FET with high-K dielectric using distinct device parameter. Paper presented at the Proceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, 124-128. doi:10.1109/iNIS.2016.038en_US
dc.identifier.isbn9781509061693-
dc.identifier.otherEID(2-s2.0-85013850462)-
dc.identifier.urihttps://doi.org/10.1109/iNIS.2016.038-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5319-
dc.description.abstractIn this work, systematic investigation of DGTFET have been made by varying different device parameter such as dielectric constant, doping concentration, work function, temperature, and channel length with their variation impact on threshold voltage (Vth). It is also analyzed that while decreasing the value of work function, energy band overlap increases, whichcauses decrease in tunneling width. Hence leads to highsource channel tunneling. DC characteristics of theproposed device like ON current, OFF current and Vth arealso examined with different device parameter engineering. TCAD device simulator was used as a 2D simulator for the optimization result of DG-TFET. © 2016 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceProceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016en_US
dc.subjectField effect transistorsen_US
dc.subjectGates (transistor)en_US
dc.subjectInformation systemsen_US
dc.subjectNanoelectronicsen_US
dc.subjectThreshold voltageen_US
dc.subjectWork functionen_US
dc.subjectChannel lengthen_US
dc.subjectDC characteristicsen_US
dc.subjectDevice parametersen_US
dc.subjectDevice simulatorsen_US
dc.subjectDoping concentrationen_US
dc.subjectDouble gateen_US
dc.subjectSubthreshold swingen_US
dc.subjectTunnel field effect transistoren_US
dc.subjectHigh-k dielectricen_US
dc.titleInvestigation of DC characteristic on DG-Tunnel FET with high-K dielectric using distinct device parameteren_US
dc.typeConference Paperen_US
Appears in Collections:Department of Electrical Engineering

Files in This Item:
There are no files associated with this item.
Show simple item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetric Badge: