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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Gopal, Maisagalla | en_US |
dc.contributor.author | Vishvakarma, Santosh Kumar | en_US |
dc.date.accessioned | 2022-03-17T01:00:00Z | - |
dc.date.accessioned | 2022-03-17T15:41:37Z | - |
dc.date.available | 2022-03-17T01:00:00Z | - |
dc.date.available | 2022-03-17T15:41:37Z | - |
dc.date.issued | 2016 | - |
dc.identifier.citation | Gopal, M., & Vishvakarma, S. K. (2016). Effect of asymmetric doping on asymmetric underlap dual-k spacer FinFET. Paper presented at the 12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015, doi:10.1109/INDICON.2015.7443774 | en_US |
dc.identifier.isbn | 9781467373999 | - |
dc.identifier.other | EID(2-s2.0-84994246340) | - |
dc.identifier.uri | https://doi.org/10.1109/INDICON.2015.7443774 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/5346 | - |
dc.description.abstract | This paper extensively analyzes the effect of asymmetric source/drain doping on asymmetric underlap Dual-k spacer Fin-Field Effect Transistor (AsymD-k FinFET). The Proposed unequal doping concentration of source and drain leads to superior short-channel characteristics that alleviate the OFF-current (IOFF) of the device. Recently, high-k spacer materials are attracted much attention because introduction of high-k spacer material enhances the electrostatic control and suppresses the short channel effects in nanoscaled devices. Introducing high-k spacer at source side restricts the source underlapped barrier. Thus, performing asymmetric doping on asymmetric dual-k spacer FinFETs results in significant reduction in IOFF, as a result there is amelioration in ION/IOFF of the device. © 2015 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
dc.source | 12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015 | en_US |
dc.subject | Drain current | en_US |
dc.subject | Electrostatic devices | en_US |
dc.subject | MOSFET devices | en_US |
dc.subject | Threshold voltage | en_US |
dc.subject | Asymmetric doping | en_US |
dc.subject | Doping concentration | en_US |
dc.subject | Electrostatic control | en_US |
dc.subject | Fin field effect transistors | en_US |
dc.subject | High- k | en_US |
dc.subject | Nano-scaled devices | en_US |
dc.subject | Short-channel effect | en_US |
dc.subject | Source and drains | en_US |
dc.subject | Field effect transistors | en_US |
dc.title | Effect of asymmetric doping on asymmetric underlap Dual-k spacer FinFET | en_US |
dc.type | Conference Paper | en_US |
Appears in Collections: | Department of Electrical Engineering |
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