Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5346
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dc.contributor.authorGopal, Maisagallaen_US
dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:41:37Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:41:37Z-
dc.date.issued2016-
dc.identifier.citationGopal, M., & Vishvakarma, S. K. (2016). Effect of asymmetric doping on asymmetric underlap dual-k spacer FinFET. Paper presented at the 12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015, doi:10.1109/INDICON.2015.7443774en_US
dc.identifier.isbn9781467373999-
dc.identifier.otherEID(2-s2.0-84994246340)-
dc.identifier.urihttps://doi.org/10.1109/INDICON.2015.7443774-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5346-
dc.description.abstractThis paper extensively analyzes the effect of asymmetric source/drain doping on asymmetric underlap Dual-k spacer Fin-Field Effect Transistor (AsymD-k FinFET). The Proposed unequal doping concentration of source and drain leads to superior short-channel characteristics that alleviate the OFF-current (IOFF) of the device. Recently, high-k spacer materials are attracted much attention because introduction of high-k spacer material enhances the electrostatic control and suppresses the short channel effects in nanoscaled devices. Introducing high-k spacer at source side restricts the source underlapped barrier. Thus, performing asymmetric doping on asymmetric dual-k spacer FinFETs results in significant reduction in IOFF, as a result there is amelioration in ION/IOFF of the device. © 2015 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.source12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015en_US
dc.subjectDrain currenten_US
dc.subjectElectrostatic devicesen_US
dc.subjectMOSFET devicesen_US
dc.subjectThreshold voltageen_US
dc.subjectAsymmetric dopingen_US
dc.subjectDoping concentrationen_US
dc.subjectElectrostatic controlen_US
dc.subjectFin field effect transistorsen_US
dc.subjectHigh- ken_US
dc.subjectNano-scaled devicesen_US
dc.subjectShort-channel effecten_US
dc.subjectSource and drainsen_US
dc.subjectField effect transistorsen_US
dc.titleEffect of asymmetric doping on asymmetric underlap Dual-k spacer FinFETen_US
dc.typeConference Paperen_US
Appears in Collections:Department of Electrical Engineering

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