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Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/5394
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dc.contributor.authorKranti, Abhinaven_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:41:48Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:41:48Z-
dc.date.issued2014-
dc.identifier.citationGhosh, D., & Kranti, A. (2014). Performance assessment of ULP analog/RF MOSFET architectures. Paper presented at the 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014, doi:10.1109/S3S.2014.7028199en_US
dc.identifier.isbn9781479974382-
dc.identifier.otherEID(2-s2.0-84946693351)-
dc.identifier.urihttps://doi.org/10.1109/S3S.2014.7028199-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/5394-
dc.description.abstractA comparative analysis of ULP analog/RF performance metrics have been presented. TFETs will be useful in high-gain ULP circuits with limited bandwidth requirement. Underlap INV and JL devices, achieving a balance between gain and bandwidth, are most suitable for ULP analog/RF applications. JL MOSFETs do not suffer from any significant degradation in metrics despite higher channel doping. © 2014 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.source2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014en_US
dc.subjectBandwidthen_US
dc.subjectMicroelectronicsen_US
dc.subjectAnalog/RF performanceen_US
dc.subjectChannel dopingsen_US
dc.subjectComparative analysisen_US
dc.subjectGain and bandwidthsen_US
dc.subjectHigh gainen_US
dc.subjectLimited bandwidthen_US
dc.subjectMOS-FETen_US
dc.subjectPerformance assessmenten_US
dc.subjectMOSFET devicesen_US
dc.titlePerformance assessment of ULP analog/RF MOSFET architecturesen_US
dc.typeConference Paperen_US
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