Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/6015
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dc.contributor.authorKranti, Abhinaven_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:45:35Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:45:35Z-
dc.date.issued2016-
dc.identifier.citationGupta, M., & Kranti, A. (2016). Transforming gate misalignment into a unique opportunity to facilitate steep switching in junctionless nanotransistors. Nanotechnology, 27(45) doi:10.1088/0957-4484/27/45/455204en_US
dc.identifier.issn0957-4484-
dc.identifier.otherEID(2-s2.0-84991571433)-
dc.identifier.urihttps://doi.org/10.1088/0957-4484/27/45/455204-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/6015-
dc.description.abstractIn this work, we examine the feasibility of triggering impact ionisation at sub-bandgap voltages through optimal utilisation of structural non-ideality induced electric field redistribution in the semiconductor film for an energy efficient steep switching junctionless (JL) transistor. While misalignment between front and back gates is often considered as a disadvantage due to loss of gate controllability, the work highlights its usefulness and applicability in nanoscale devices to engineer the electric field to enhance the product of current density (J) and electric field (E) and activate impact ionisation at sub-bandgap applied voltages. Results show that intentionally misaligned gates in silicon and germanium based JL devices exhibit an inclined conduction channel and achieve a nearly ideal value of steep subthreshold swing (∼ 1 mV decade-1) at room temperature. The work provides new viewpoints to realise energy efficient JL devices through the sharp increase of drain current from off-state to on-state achieved due to intentional misalignment between front and back gates. © 2016 IOP Publishing Ltd.en_US
dc.language.isoenen_US
dc.publisherInstitute of Physics Publishingen_US
dc.sourceNanotechnologyen_US
dc.subjectAlignmenten_US
dc.subjectDrain currenten_US
dc.subjectElectric fieldsen_US
dc.subjectElectric lossesen_US
dc.subjectEnergy efficiencyen_US
dc.subjectEnergy gapen_US
dc.subjectImpact ionizationen_US
dc.subjectNanotransistorsen_US
dc.subjectSemiconductor junctionsen_US
dc.subjectStructural optimizationen_US
dc.subjectDouble gateen_US
dc.subjectInduced electric fieldsen_US
dc.subjectjunctionlessen_US
dc.subjectJunctionless transistoren_US
dc.subjectMOS-FETen_US
dc.subjectSemiconductor filmsen_US
dc.subjectSteep subthreshold swingsen_US
dc.subjectSubthreshold swingen_US
dc.subjectMOSFET devicesen_US
dc.titleTransforming gate misalignment into a unique opportunity to facilitate steep switching in junctionless nanotransistorsen_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Electrical Engineering

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