Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/6077
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dc.contributor.authorVishvakarma, Santosh Kumaren_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:46:06Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:46:06Z-
dc.date.issued2015-
dc.identifier.citationSharma, D., & Vishvakarma, S. K. (2015). Analyses of DC and analog/RF performances for short channel quadruple-gate gate-all-around MOSFET. Microelectronics Journal, 46(8), 731-739. doi:10.1016/j.mejo.2015.05.008en_US
dc.identifier.issn0026-2692-
dc.identifier.otherEID(2-s2.0-84933524208)-
dc.identifier.urihttps://doi.org/10.1016/j.mejo.2015.05.008-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/6077-
dc.description.abstractIn this paper, for the first time, we have analyzed DC characteristics and analog/RF performances for nanowire quadruple-gate (QuaG) gate-all-around (GAA) metal oxide semiconductor field effect transistor (MOSFET), using isomorphic polynomial function for potential distribution. The QuaG GAA MOSFET not only suppresses the short channel effects (SCEs) and offer ideal subthreshold slope (SS), but also is a good candidate for analog/RF device due to its high transconductance (gm) and high cutoff frequency (fT). Therefore, this work would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequencies covering RF spectrum. For this, the developed model is based on the solution of 3D Laplace and Poisson's equations for subthreshold and strong inversion regions respectively. The developed potential model has been used to formulate a new model for total gate, drain and source charge. Further, the expression for different capacitance for investigating RF performance is obtained from the developed model. Finally, the developed device electrostatics for QuaG GAA MOSFET have been used for the analysis of analog/RF performance. Different capacitances and analog/RF figures of merit are extracted from small signal frequency (1 MHz) ac device simulation. Whereas technology computer-aided design (TCAD) simulations have been performed by 3D ATLAS, Silvaco International. © 2015 Published by Elsevier Ltd.en_US
dc.language.isoenen_US
dc.publisherElsevier Ltden_US
dc.sourceMicroelectronics Journalen_US
dc.subjectCapacitanceen_US
dc.subjectComputer aided designen_US
dc.subjectCutoff frequencyen_US
dc.subjectElectron beam lithographyen_US
dc.subjectElectronic design automationen_US
dc.subjectField effect transistorsen_US
dc.subjectGallium alloysen_US
dc.subjectHeterojunction bipolar transistorsen_US
dc.subjectMetalsen_US
dc.subjectMOS devicesen_US
dc.subjectNanowiresen_US
dc.subjectSilicon on insulator technologyen_US
dc.subjectTransconductanceen_US
dc.subjectGate-all-arounden_US
dc.subjectGate-all-around MOSFETen_US
dc.subjectIntrinsic gainen_US
dc.subjectMaximum oscillation frequencyen_US
dc.subjectPotential distributionsen_US
dc.subjectSubthreshold and strong inversion regionsen_US
dc.subjectTechnology computer aided designen_US
dc.subjectTransconductance generation factorsen_US
dc.subjectMOSFET devicesen_US
dc.titleAnalyses of DC and analog/RF performances for short channel quadruple-gate gate-all-around MOSFETen_US
dc.typeJournal Articleen_US
Appears in Collections:Department of Electrical Engineering

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