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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Vishvakarma, Santosh Kumar | en_US |
dc.date.accessioned | 2022-03-17T01:00:00Z | - |
dc.date.accessioned | 2022-03-17T15:46:23Z | - |
dc.date.available | 2022-03-17T01:00:00Z | - |
dc.date.available | 2022-03-17T15:46:23Z | - |
dc.date.issued | 2014 | - |
dc.identifier.citation | Vijayvargiya, V., & Vishvakarma, S. K. (2014). Effect of drain doping profile on double-gate tunnel field-effect transistor and its influence on device RF performance. IEEE Transactions on Nanotechnology, 13(5), 974-981. doi:10.1109/TNANO.2014.2336812 | en_US |
dc.identifier.issn | 1536-125X | - |
dc.identifier.other | EID(2-s2.0-84958111725) | - |
dc.identifier.uri | https://doi.org/10.1109/TNANO.2014.2336812 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/6112 | - |
dc.description.abstract | In this paper, we have investigated the effect of drain doping profile on a double-gate tunnel field-effect transistor (DG-TFET) and its radio-frequency (RF) performances. Lateral asymmetric drain doping profile suppresses the ambipolar behavior, improves OFF-state current, reduces the gate-drain capacitance, and improves the RF performance. Further, placing the high-density layer in the channel near the source-channel junction, a reduction in the width of depletion region, improvement in ON-state current (I rm ON), and subthreshold slope are analyzed for this asymmetric drain doping. However, it also improves many RF figures of merit for the DG-TFET. Furthermore, lateral asymmetric doping effects on RF performances are also checked for the various channel length. Therefore, this paper would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequencies covering RF spectrum. So, the RF figures of merit for the DG-TFET are analyzed in terms of transconductance (g m), unit-gain cutoff frequency (f-T), maximum frequency of oscillation $(f-), and gain bandwidth product. For this, the RF figures of merit have been extracted from the Y-parameter matrix generated by performing the small-signal ac analysis. Technology computer-aided design simulations have been performed by 2-D ATLAS, Silvaco International, Santa Clara, CA, USA. © 2002-2012 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
dc.source | IEEE Transactions on Nanotechnology | en_US |
dc.subject | Capacitance | en_US |
dc.subject | Computer aided design | en_US |
dc.subject | Cutoff frequency | en_US |
dc.subject | Drain current | en_US |
dc.subject | Electron tunneling | en_US |
dc.subject | Gates (transistor) | en_US |
dc.subject | Logic gates | en_US |
dc.subject | MOS devices | en_US |
dc.subject | Radio waves | en_US |
dc.subject | Reconfigurable hardware | en_US |
dc.subject | Silicon on insulator technology | en_US |
dc.subject | Doping profiles | en_US |
dc.subject | Gain-bandwidth products | en_US |
dc.subject | Gate-drain capacitance | en_US |
dc.subject | Maximum frequency of oscillations | en_US |
dc.subject | Performance evaluation | en_US |
dc.subject | Radio frequencies | en_US |
dc.subject | Technology computer aided design | en_US |
dc.subject | Tunnel field effect transistor | en_US |
dc.subject | Field effect transistors | en_US |
dc.title | Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF Performance | en_US |
dc.type | Journal Article | en_US |
Appears in Collections: | Department of Electrical Engineering |
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