1. IDR@IIT Indore

Browsing by Author Khan, Sajid

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Showing results 1 to 14 of 14
Issue DateTitleAuthor(s)
2019ASIC Implementation of Biologically Inspired Spiking Neural NetworkRajput, Gunjan; Raut, Gopal; Khan, Sajid; Gupta, Neha; Behor, Ankur; Vishvakarma, Santosh Kumar
2021D flip-flop based TRNG with zero hardware cost for IoT security applicationsKhan, Sajid; Shah, Ambika Prasad; Vishvakarma, Santosh Kumar
2019Dual-Edge Triggered Lightweight Implementation of AES for IoT SecurityKhan, Sajid; Gupta, Neha; Vishwakarma, Abhinav; Vishvakarma, Santosh Kumar
2019Efficient Low-Precision CORDIC Algorithm for Hardware Implementation of Artificial Neural NetworkRaut, Gopal; Bhartiy, Vishal; Rajput, Gunjan; Khan, Sajid; Vishvakarma, Santosh Kumar
2020An energy-efficient data-dependent low-power 10T SRAM cell design for LiFi enabled smart street lighting system applicationGupta, Neha; Sharma, Vishal; Shah, Ambika Prasad; Khan, Sajid; Vishvakarma, Santosh Kumar
2021Error-tolerant reconfigurable vdd 10t sram architecture for iot applicationsGupta, Neha; Shah, Ambika Prasad; Khan, Sajid; Vishvakarma, Santosh Kumar
2019Low Leakage Highly Stable Robust Ultra Low Power 8T SRAM CellGupta, Neha; Khan, Sajid; Vishwakarma, Abhinav; Vishvakarma, Santosh Kumar
2020On-chip adaptive vdd scaled architecture of reliable sram cell with improved soft error toleranceGupta, Neha; Shah, Ambika Prasad; Kumar, Rana Sagar; Khan, Sajid; Vishvakarma, Santosh Kumar
2022Pass Transistor XOR Gate Based Radiation Hardened RO-PUFKhan, Sajid
2020A symmetric D flip-flop based PUF with improved uniquenessKhan, Sajid; Shah, Ambika Prasad; Gupta, Neha; Vishvakarma, Santosh Kumar
2019An Ultra Low Power AES Architecture for IoTKhan, Sajid; Gupta, Neha; Raut, Gopal; Rajput, Gunjan; Vishvakarma, Santosh Kumar
2019An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applicationsKhan, Sajid; Shah, Ambika Prasad; Gupta, Neha; Vishvakarma, Santosh Kumar
2020Utilizing manufacturing variations to design a tri-state flip-flop PUF for IoT security applicationsKhan, Sajid; Shah, Ambika Prasad; Gupta, Neha; Vishvakarma, Santosh Kumar
2019A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC ImplementationsKhan, Sajid; Vishvakarma, Santosh Kumar
Showing results 1 to 14 of 14