Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/13019
Title: Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLS
Authors: Chaurasia, Rahul
Sengupta, Anirban
Keywords: Hardware security;HLS;Reusable IP cores
Issue Date: 2024
Publisher: Elsevier B.V.
Citation: Chaurasia, R., & Sengupta, A. (2024). Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLS. Integration. Scopus. https://doi.org/10.1016/j.vlsi.2023.102114
Abstract: This paper presents a novel dual defense security methodology for fault detectable reusable hardware intellectual property (IP) core against reverse engineering and piracy using multi-cut based architectural obfuscation and handprint biometric signature, useful for consumer electronics (CE) systems. The proposed approach, firstly generates a fault detectable design corresponding to target application framework. Subsequently, multiple cut insertion is executed resulting in multi-checkpointing which in turn camouflages the hardware design architecture during high level synthesis (HLS), thereby making it uninterpretable for an adversary. Next, handprint biometric signature of IP vendor is covertly embedded into the fault detectable IP design, which provides robust and seamless detective countermeasure against piracy. The proposed methodology achieves the following: a) strength of obfuscation ∼14 % b) robust detective control against piracy using handprint biometric signature at 0.0 % design cost overhead c) robust security in terms of digital proof against piracy as evident from lesser probability of coincidence and higher tamper tolerance. © 2023 Elsevier B.V.
URI: https://doi.org/10.1016/j.vlsi.2023.102114
https://dspace.iiti.ac.in/handle/123456789/13019
ISSN: 0167-9260
Type of Material: Journal Article
Appears in Collections:Department of Computer Science and Engineering

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