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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Sharma, Radheshyam | en_US |
dc.contributor.author | Dhakad, Narendra Singh | en_US |
dc.contributor.author | Reddy, Govindu Sathvik | en_US |
dc.contributor.author | Vishvakarma, Santosh Kumar | en_US |
dc.date.accessioned | 2024-07-18T13:48:30Z | - |
dc.date.available | 2024-07-18T13:48:30Z | - |
dc.date.issued | 2024 | - |
dc.identifier.citation | Sharma, R., Dhakad, N. S., Reddy, G. S., Sharma, V., & Vishvakarma, S. K. (2024). ReCAM: Resistive RAM Digital Content Addressable Memory Using Novel 3T1R Bitcell. IEEE Electron Devices Technology and Manufacturing Conference: Strengthening the Globalization in Semiconductors, EDTM 2024. Scopus. https://doi.org/10.1109/EDTM58488.2024.10511788 | en_US |
dc.identifier.isbn | 979-8350371529 | - |
dc.identifier.other | EID(2-s2.0-85193265279) | - |
dc.identifier.uri | https://doi.org/10.1109/EDTM58488.2024.10511788 | - |
dc.identifier.uri | https://dspace.iiti.ac.in/handle/123456789/14049 | - |
dc.description.abstract | The demands of data-intensive applications necessitate solutions that are high-speed and energy-efficient and deliver superior performance. Non-volatile memory devices, such as Resistive Random Access Memory (ReRAM), have emerged as promising options for enhancing computing systems. In this study, we introduce an innovative 3T1R bitcell designed specifically for Content Addressable Memory (CAM) operations, implemented at the 65nm CMOS technology node. Our proposed design exhibits notable advantages such as 1.27x reduction in sensing latency and a 2.67x decrease in search energy consumption for a 64-bit word size compared to the current state-of-the-art. Furthermore, the design ensures reliable and robust performance across various process corners and temperature variations. © 2024 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
dc.source | IEEE Electron Devices Technology and Manufacturing Conference: Strengthening the Globalization in Semiconductors, EDTM 2024 | en_US |
dc.subject | non-volatile content addressable memory (nvCAM) | en_US |
dc.subject | Non-volatile memory (NVM) | en_US |
dc.subject | resistive RAM (ReRAM) | en_US |
dc.title | ReCAM: Resistive RAM Digital Content Addressable Memory Using Novel 3T1R Bitcell | en_US |
dc.type | Conference Paper | en_US |
Appears in Collections: | Department of Electrical Engineering |
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