An insightful methodology for CMOS logic and analog circuit design with 500 mV supply voltage

Abstract

Over the past few decades, there has been significant progress in developing ultra-low power (ULP) devices, circuits, and systems. The scientific community has focused on developing technologies that consume less energy, which is essential for extending battery life, fast tracking the development of portable and wearable devices, and Internet of Things (IoT) deployments. The development of ULP circuits is driven by the need for energy-efficient electronics that can support sustainable technology. Understanding the basics of power consumption in integrated circuits is central to this effort. However, designing ULP circuits presents challenges such as minimizing energy use without sacrificing performance. Simulation and modeling tools are crucial in overcoming these challenges, allowing for the testing and optimization of ULP circuits.