Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/14939
Title: Performance Analysis of RIS-Assisted Alamouti STBC Scheme
Authors: Bhatia, Vimal
Keywords: Alamouti STBC;outage probability;Reconfigurable intelligent surface (RIS);symbol error rate (SER)
Issue Date: 2024
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Kumari, S., Srirangarajan, S., & Bhatia, V. (2024). Performance Analysis of RIS-Assisted Alamouti STBC Scheme. IEEE Wireless Communications Letters. Scopus. https://doi.org/10.1109/LWC.2024.3471663
Abstract: Reconfigurable intelligent surface (RIS) has attracted a lot of attention as they provide additional transmission paths with lower hardware complexity and enhanced spatial diversity. We consider a RIS-assisted wireless system where communication between the source and the destination is facilitated using a RIS. The challenge of acquiring channel state information (CSI) at RIS is non-trivial as RIS is typically a passive device. In order to reduce the overhead of CSI acquisition at RIS, we employ the Alamouti space-time block code (STBC) scheme to virtually transmit the M-PSK signal from RIS to the destination. This reduces the required number of radio frequency (RF) chains at the source, leading to reduced hardware complexity. We analyze the performance of this system in terms of the symbol error rate (SER) and outage probability by deriving the analytical expressions and comparing with the conventional Alamouti STBC. Simulations results are presented to validate the analytical expressions and results. © 2012 IEEE.
URI: https://doi.org/10.1109/LWC.2024.3471663
https://dspace.iiti.ac.in/handle/123456789/14939
ISSN: 2162-2337
Type of Material: Journal Article
Appears in Collections:Department of Electrical Engineering

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