Please use this identifier to cite or link to this item:
https://dspace.iiti.ac.in/handle/123456789/15033
Title: | HLS based Hardware Watermarking of Blur, Embossment and Sharpening Filters Using Fused Ocular Biometrics and Digital Signature |
Authors: | Chourasia, Vishal Sengupta, Anirban Chaurasia, Rahul |
Keywords: | HLS;IP design;Ocular Biometric;Watermarking |
Issue Date: | 2024 |
Publisher: | IEEE Computer Society |
Citation: | Chourasia, V., Sengupta, A., & Chaurasia, R. (2024). HLS based Hardware Watermarking of Blur, Embossment and Sharpening Filters Using Fused Ocular Biometrics and Digital Signature. International System on Chip Conference. Scopus. https://doi.org/10.1109/SOCC62300.2024.10737813 |
Abstract: | Securing reusable hardware intellectual property (IP) cores has become increasingly critical due to their widespread application in multimedia systems and modern consumer electronics. These IP cores, particularly digital image filter cores, play a vital role in executing data and computation-intensive tasks like image sharpening, edge detection, and blurring. Therefore, ensuring the security of these digital image filter IP cores is essential for any image processing-based applications. This paper proposes a novel hardware watermarking approach utilizing high-level synthesis (HLS) based design methodology. The watermarking process integrates the IP vendor's ocular biometrics and encoded digital signature for enhanced security and robustness of the design against potential threats of IP piracy and false claim of IP ownership. The proposed approach begins with the extraction of unique biometric features from ocular image, which are fused with a secure digital signature to generate a robust watermark. Through the proposed approach, the watermark is seamlessly integrated into the design in form of encoded hardware watermarking constraints (as digital evidence) during the register allocation phase of HLS. Experimental results demonstrate the effectiveness of the proposed watermarking technique in terms of the following: (a) achieves a low probability of false positive (watermark collision), signifying a low probability of coincidence (b) achieves higher robustness against tampering/brute force attacks signifying higher tamper tolerance ability and (c) ensures robust security of IP designs against piracy and false IP ownership at zero design cost overhead. © 2024 IEEE. |
URI: | https://doi.org/10.1109/SOCC62300.2024.10737813 https://dspace.iiti.ac.in/handle/123456789/15033 |
ISSN: | 2164-1676 |
Type of Material: | Conference Paper |
Appears in Collections: | Department of Computer Science and Engineering |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.
Altmetric Badge: