Conclusion

Abstract

Research on HLS has been ongoing for the last two decades by the scientific community. However, HLS exploited for security, has become the focus in recent years. It has been an active area of interest for the security community all over the globe, especially in the last few years due to manifold benefits offered by HLS such as lower overhead, flexibility in architecture exploration, and design automation. Security and trust in hardware have become more important than ever before due to the emergence of several points of vulnerabilities and the growing sophistication of cyber-attacks. Through this book, a reader gained valuable insights on how efficiently the HLS framework can be leveraged to offer several benefits for hardware security. This is particularly important when designing specialized hardware (or IPs/modules) for data-intensive/power-hungry applications such as convolutional layer in CNN, signal filtering through digital filters, image processing through image processing filters, multimedia compression/decompression using JPEG CODECs, as well as other digital signal processing applications, etc. The hardware IPs of such algorithms/applications are typically designed using HLS instead of starting from RTL (or lower levels) due to the complexity involved. Therefore, it is natural, that the security of such hardware IPs should be dealt with by exploiting the HLS framework such that it results in lower overhead, lesser design time, and greater flexibility for the designer. Hardware security of smaller applications with lesser complexity such as traditional combinational/sequential circuit blocks can be handled at the RTL or gate level. However, it’s not pragmatic to do so for the aforementioned complex applications. This book, therefore, provided an important guide for readers to understand how to design secure specialized hardware IPs using HLS. The book covers how HLS flow can be used to address critical security threats (that can potentially affect reusable hardware IPs) such as IP piracy, IP ownership abuse, watermark collision, ghost insertion search attack, tampering attack, forgery attack, reverse engineering, malicious RTL alteration, SCA, etc. © The Institution of Engineering and Technology and its licensors 2024.