Memristor-Based Hardware Architecture for Edge Detection

Abstract

This paper introduces a memristor-based edge detection architecture designed to enhance hardware efficiency for AI and real-time applications. Memristors are utilized for their compact size, low power requirements, and ability to integrate memory and computation within a single device. The proposed design reduces circuit complexity and demonstrates effective performance in targeted test cases compared to traditional analog edge detection circuits. Implementing the Sobel filter with memristors enables efficient, parallel edge detection while minimizing power usage. Simulation results confirm the approach's viability

however, current evaluations are limited to specific scenarios. Future work will focus on extending validation across more diverse conditions. © 2025 IEEE.