Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/1802
Title: High performance and energy efficient architecture for PRESENT cipher and its FPGA implementation
Authors: Soni, Himanshu
Supervisors: Vishvakarma, Santosh Kumar
Pandey, Jai Gopal
Keywords: Electrical Engineering
Issue Date: 1-Jul-2019
Publisher: Department of Electrical Engineering, IIT Indore
Series/Report no.: MT103
Abstract: Lightweight cryptography plays a crucial role in the emerging authentication-based omnipresent computing applications in the resource-limited domain. In this paper, a high-performance, resource and energy-efficient VLSI architecture for PRESENT block cipher has been proposed and named it as p opt-80. Here, a 16-bit data-path based architecture that supports pipelined input of the next block with the output of the current block has been used. The proposed architecture takes 42 clock cycles to compute the first block (64-bit) of data and 37 clock cycles for further blocks which makes the effective latency of 37 clock cycles. In order to compare the architecture with existing 16-bit architectures, the architecture has been implemented on a set of FPGA devices that include Xilinx Virtex-4 xc4vlx24-12 668, Virtex-5. At 13.56 MHz RFID frequency, the proposed architecture provides a throughput of 23.46 Mbps and consumes around 72% lesser energy in comparison to existing 16-bit architectures that suits for most of the Internet-of-things (IoT) application. In this architecture, we can either have fixed input or can have varied input key. The proposed design is best suitable for modern devices for area and performance metrics. Parameters like, Throughput-per-slice and Energy-per-bit also improved to a great extent which makes it an optimized architecture for speed and energy consumption with the area. s-box is implemented using combinational. So it does not requires any extra memory to store input of s-box. It is also synthesizable for ASIC implementations.
URI: https://dspace.iiti.ac.in/handle/123456789/1802
Type of Material: Thesis_M.Tech
Appears in Collections:Department of Electrical Engineering_ETD

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