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https://dspace.iiti.ac.in/handle/123456789/18969
| Title: | Detection of HLS-based Hardware Trojans using Logistic Regression Binary-Classifier |
| Authors: | Sengupta, Anirban Bhui, Nabendu Verma, Vipin |
| Issue Date: | 2026 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Sengupta, A., Bhui, N., & Verma, V. (2026). Detection of HLS-based Hardware Trojans using Logistic Regression Binary-Classifier. IEEE Embedded Systems Letters. https://doi.org/10.1109/LES.2026.3719415 |
| Abstract: | Literature has established that an attacker can exploit malicious/Trojan inserted high level synthesis (HLS) framework/tool for compromising hardware intellectual property (IP) designs. This paper presents a novel logistic regression (LR) based machine learning (ML) detection methodology capable of detecting the following seven state-of-the-art (SOTA) HLS Trojan variances: timer-sensitive trojan trigger based automated logic-transformation (TST-HT), time-bomb hardware Trojan (TB-HT), performance degradation hardware Trojan (PD-HT), battery exhaustion hardware Trojan (BE-HT), downgrade attack hardware Trojan (DA-HT), denial of service hardware Trojan (DoS-HT), and functional hardware Trojan (F-HT). The proposed detection technique is capable of very high accuracy with 0% FN and > 0% FP rates. © 2009-2012 IEEE. |
| URI: | https://dx.doi.org/10.1109/LES.2026.3719415 https://dspace.iiti.ac.in:8080/jspui/handle/123456789/18969 |
| ISSN: | 1943-0663 |
| Type of Material: | Journal Article |
| Appears in Collections: | Department of Computer Science and Engineering |
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