Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/19198
Title: Integrated Hardware Watermarking Framework based on 3-factor Encoding, Connectivity Matrix and Hashing for Securing Sharpening Filter IP Cores against Piracy
Authors: Bhui, Nabendu
Sengupta, Anirban
Chourasia, Vishal
Issue Date: 2026
Publisher: Institute of Electrical and Electronics Engineers Inc.
Citation: Bhui, N., Sengupta, A., & Chourasia, V. (2026). Integrated Hardware Watermarking Framework based on 3-factor Encoding, Connectivity Matrix and Hashing for Securing Sharpening Filter IP Cores against Piracy. ICCE-TW 2026 - The 13th IEEE International Conference on Consumer Electronics - Taiwan: Sustainable and Human-Centered AI in Consumer Electronics, Proceedings, 301–302. https://doi.org/10.1109/ICCE-TAIWAN71481.2026.11652837
Abstract: Image processing filter hardware intellectual property (IP) cores are commonly used in consumer electronics (CE) hardware. This paper presents a novel integrated hardware watermarking framework, based on 3-factor encoding, connectivity matrix and hashing framework, for detecting fake/pirated IP designs, before they are potentially integrated into the system-on-chip (SoC) of CE systems. Comparison of the proposed approach with prior works indicated, significantly higher tamper tolerance (against tampering attack), stronger watermark proof as well as lower probability of decoding attack. © 2026 IEEE.
URI: https://dx.doi.org/10.1109/ICCE-TAIWAN71481.2026.11652837
https://dspace.iiti.ac.in/handle/123456789/19198
ISBN: 979-831950642-9
Type of Material: Conference Paper
Appears in Collections:Department of Computer Science and Engineering

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