Yttria based memristive system for neuromorphic applications

Abstract

Memristor, the so-called fourth fundamental circuit element, has drawn extensive attention in recent years for its enormous potential as the next-generation non-volatile memory (NVM). Resistive random-access memory (RRAM), being one of the major applications of memristor, is a promising candidate to replace conventional charge-based flash memory in future data storage applications. The primary advantages of RRAMs over conventional memories are their simple structure, fast switching mechanism, low-power consumption, and high stacking density. Yttria (Y2O3) has been studied as a replacement of SiO2 for gate oxide material in thin-film transistor-based memory devices. Yttria offers an attractive substitute of SiO2 as gate oxide for thin-film transistor-based memory applications due to excellent physical properties such as low lattice mismatch with Si substrate, high dielectric constant (~10-18) for gate oxide. However, minimal literature is present on yttria-based RRAM. The fabrication of yttria-based RRAM by dual ion beam sputtering (DIBS) system has not been reported to date. DIBS system is noteworthy since it produces high-quality thin films with reasonably good compositional stoichiometry, small surface roughness, and excellent adhesion to the substrate even for films grown even at room temperature. In this research work, firstly, the optimization of deposition conditions of yttria switching layer is performed in order to find out the favorable conditions for resistive switching (RS) behavior. This is important as DIBS system has many parameters that can be changed during deposition, such as temperature, oxygen partial pressure, and ion beam voltage, etc. These parameters affect the properties of deposited thin films such as crystallinity, resistance, and interface, etc. The deposition temperature is optimized in the first step of this study. In this stage, DIBS deposition temperature during the growth of yttria on Si is optimized. During this stage, Substrate temperature of the device is varied from 100 to 500 °C (100 (N1), 200 (N2), 300 (N3), 400 (N4), to 500 °C (N5)) while all other DIBS deposition parameters are kept constant. The XRD patterns of yttria thin films show that the crystallinity of yttria films (N1N5) is observed to change from highly textured (N1, N2) to amorphous (N3, N4) and then to polycrystalline (N5) as the deposition temperature increases. The current-voltage measurement of these devices indicated that amorphous yttria layer shows RS characteristics, while a highly crystalline yttria layer is not very useful for RS application. SiO2 layer, present at yttria and Si interfaces, influences the grain surface area at the top surface of the yttria layer. As the thickness of SiO2 layer increases along with deposition temperatures, the grain surface area variations in yttria film also increases. As the level of surface area variation and thickness for the SiO2 layer decreases, the endurance of the device improves. Moreover, the devices with amorphous oxide layer show the smaller distribution in set-reset voltage than devices with polycrystalline oxide. The quantitative analysis of current-voltage characteristics shows that variation in the switching voltage (set/reset or both) correlates with grin surface area of grains present in the Y2O3 films. Such direct observation of the correlation is shown in this first time. The endurance measurements carried out for least variable amorphous RS device show high repeatability for ~23000 switching cycles. After the optimization of deposition temperature, the correct Ar:O2 flow rate needed to be explored, which can further enhance the RS behavior in DIBS grown yttria based devices. The effect of oxygen partial pressure variation has been studied with respect to the RS behavior. The ratio of Ar to O2 partial pressure has been varied for devices N50 (5:0), N41 (4:1), N32 (3:2) at this stage. It is observed that N50 and N41 do not show any RS whereas N32 shows RS for a small number of cycles (~4) initially, and subsequently the RS behavior has disappeared. It is found that the device (N3), which has a deposition temperature of 300°C and a mixture of Ar: O2 with a ratio of 2:3, shows the best RS characteristics. After the optimization of yttrium oxide layer for the RS behavior, the effect of schottky interface on the RS behavior of yttria has been investigated via changing bottom electrodes (BE) in Al/Y2O3/BE-type device structure. In this stage of our study, three devices N3, P3, and A3 are used to further understand the effect of the interface on the behavior of yttria-based RRAM. Devices P3 (Al/Y2O3/p-Si) and A3 (Al/Y2O3/Al) are fabricated under the same condition (deposition temperature = 300°C and Ar:O2 = 2:3) as in case of N3 but with different BE. N3, P3, and A3 have n-Si, p-Si and Al as their bottom electrode, respectively. It is important to note that N3 has one Schottky interface between Al and Y2O3, while A3 has two Schottky interfaces between Al and Y2O3. Also, the transformation from unipolar (Al/Y2O3/n-Si) to bipolar (Al/Y2O3/Al) switching modes has taken place after moving to a system of single SBD (Al/Y2O3/n-Si) to double SBD (Al/Y2O3/Al). This transformation confirms the predominant role of Schottky interface between Al and Y2O3 in our fabricated Al/Y2O3/BE type structures. In the last chapter of this thesis, the neuromorphic behavior of optimized Al/Y2O3/n-Si device is discussed. Synaptic functions such as nonlinear transmission characteristics, long-term plasticity, short-term plasticity and “learning behavior” are achieved using a single synaptic device based on cost-effective metal-insulator-semiconductor (MIS) structure. A “learning behavior” function is demonstrated for yttria based memristive device, which bears resemblance to certain memory functions of biological systems. The realization of essential synaptic functions in a cost-effective MIS structure would promote much cheaper synapse for artificial neural networks.