Optimized physical design of high-performance network interface for data packet processing

Abstract

This thesis has been focused entirely on the physical design of a smart network interface. In the chip designing and manufacturing industry, the physical design department plays a vital role as day by day they are approaching the lower technology node. The sophisticated physical design of two primary partitions has been developed during this internship. Both partitions (partition “A” and partition “B”) belong to two different subsystems; hence they both had their various problems and requirements. Although the main design flow was the same for both, the development has been done with different approaches as per the requirements. Partition “A” has been organized based on data flow fly lines, and partition B has been arranged according to its hierarchical setup. Different approaches also have been applied to understand the partitions and their behavior. Industry-level optimization techniques have also been involved and described in this report, as well. These optimizations were mostly focused on area and timing. Before going for the final tape out, a partition needs to go through all different stages and several verifications. The main focus of this internship was to understand these all stages and learn to prepare a partition for industrial standard tape out. All the required phases and procedures have been described in detail in this report.