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https://dspace.iiti.ac.in/handle/123456789/4532
Title: | Hologram-based structural obfuscation for DSP cores |
Authors: | Sengupta, Anirban Rathor, Mahendra |
Issue Date: | 2020 |
Publisher: | Institution of Engineering and Technology |
Citation: | Sengupta, A., & Rathor, M. (2020). Hologram-based structural obfuscation for DSP cores. Frontiers in securing IP cores (pp. 207-265) |
Abstract: | This chapter highlights an alternative paradigm for the design of structurally obfuscated digital signal processing (DSP) cores inspired by security hologram. Discussion on different structural-obfuscation techniques have been included in this chapter with emphasis on the algorithms used for obfuscation during design synthesis of high-level synthesis (HLS). The chapter is organized as follows: Section 8.1 introduces the importance of obfuscation for IP cores during the system-on-chip design process; Section 8.2 discusses the background on security hologram; Section 8.3 highlights the possible use of applying the hologram concept for structural obfuscation; Section 8.4 explains the hologram-based obfuscation methodology for DSP cores; Section 8.5 presents illustrative examples for hologram-based obfuscation on DSP cores; Section 8.6 discusses the process of determination of gate count for un-obfuscated and obfuscated designs; Section 8.7 presents a demonstration and examples of high-level transformation-based obfuscated DSP circuits; Section 8.8 presents design examples of un-obfuscated (baseline) DSP circuits; Section 8.9 presents analysis on case studies; Section 8.10 concludes the chapter. © The Institution of Engineering and Technology 2020. |
URI: | https://dspace.iiti.ac.in/handle/123456789/4532 |
ISBN: | 9781839530319 |
Type of Material: | Book Chapter |
Appears in Collections: | Department of Computer Science and Engineering |
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