Please use this identifier to cite or link to this item: https://dspace.iiti.ac.in/handle/123456789/4688
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dc.contributor.authorSengupta, Anirbanen_US
dc.date.accessioned2022-03-17T01:00:00Z-
dc.date.accessioned2022-03-17T15:35:10Z-
dc.date.available2022-03-17T01:00:00Z-
dc.date.available2022-03-17T15:35:10Z-
dc.date.issued2015-
dc.identifier.citationSengupta, A., & Sedaghat, R. (2015). Exploration of optimal multi-cycle transient fault secured datapath during high level synthesis based on user area-delay budget. Paper presented at the Canadian Conference on Electrical and Computer Engineering, , 2015-June(June) 69-74. doi:10.1109/CCECE.2015.7129162en_US
dc.identifier.isbn9781479958276-
dc.identifier.issn0840-7789-
dc.identifier.otherEID(2-s2.0-84938355010)-
dc.identifier.urihttps://doi.org/10.1109/CCECE.2015.7129162-
dc.identifier.urihttps://dspace.iiti.ac.in/handle/123456789/4688-
dc.description.abstractDetecting error or producing correct output is the primary function of a fault secured system. In the context of multi-cycle transient faults, design space exploration (DSE) of an optimal fault secured datapath based on user constraints of area and delay during high level synthesis (HLS) is considered notorious. This is derived from the fact that generation of a user budget bounded multi-cycle transient fault secured datapath may not be possible for every type of candidate design solution produced during exploration. Additionally, insertion of inapt cut to optimize delay overhead associated with fault security in most cases may not yield optimal solutions in the context of user constraints/budgets. This paper resolves the above problems which has not been addressed in the literature so far by proposing the following novelties: (a) fault secured particle swarm optimization (PSO) driven DSE methodology (b) Techniques to handle multi-cycle transient faults during DSE (c) Schemes for choosing pertinent edges for inserting cut (s) in scheduled Control Data Flow Graph (CDFG) that optimizes the delay overhead associated with fault security. Results of the proposed approach indicated that the fault secured solution found comprehensively minimizes the final cost as well as satisfies the conflicting user budgets. Further, the final fault secured solution yielded is significantly lower in cost compared to solutions obtained through recent similar approaches. © 2015 IEEE.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.sourceCanadian Conference on Electrical and Computer Engineeringen_US
dc.subjectBudget controlen_US
dc.subjectData flow analysisen_US
dc.subjectData flow graphsen_US
dc.subjectGraphic methodsen_US
dc.subjectParticle swarm optimization (PSO)en_US
dc.subjectControl data flow graphsen_US
dc.subjectDelay overheadsen_US
dc.subjectDesign solutionsen_US
dc.subjectDesign space explorationen_US
dc.subjectOptimal solutionsen_US
dc.subjectPrimary functionsen_US
dc.subjectTransient faultsen_US
dc.subjectUser constraintsen_US
dc.subjectHigh level synthesisen_US
dc.titleExploration of optimal multi-cycle transient fault secured datapath during high level synthesis based on user area-delay budgeten_US
dc.typeConference Paperen_US
Appears in Collections:Department of Computer Science and Engineering

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